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CSR8615A04-IQQF-R View Datasheet(PDF) - Unspecified

Part Name
Description
MFG CO.
'CSR8615A04-IQQF-R' PDF : 114 Pages View PDF
9.3.8 PCM Timing Information
Symbol Parameter
Min
Typ
Max
Unit
fmclk
-
tmclkh (a)
tmclkl (a)
-
tdmclksynch
tdmclkpout
tdmclklsyncl
tdmclkhsyncl
tdmclklpoutz
128
4MHz DDS generation.
Selection of frequency
is programmable. See
-
256
-
kHz
Section 9.3.10.
PCM_CLK frequency
48MHz DDS
generation. Selection
of frequency is
2.9
programmable. See
Section 9.3.10.
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512
Se8- ptember
-
-
-
-
-
-
-
-
16-,
-
-
-
21
20
20
20
20
20
2013
kHz
kHz
ns
ns
ns pk-pk
ns
ns
ns
ns
ns
tdmclkhpoutz
Delay time from PCM_CLK high to PCM_OUT
high impedance
-
-
20
ns
tsupinclkl
Set-up time for PCM_IN valid to PCM_CLK low
20
-
-
ns
thpinclkl
Hold time for PCM_CLK low to PCM_IN invalid
0
-
-
ns
Table 9.6: PCM Master Timing
(a) Assumes normal system clock operation. Figures vary during low-power modes, when system clock speeds are reduced.
Pre-production Information
© Cambridge Silicon Radio Limited 2013
Confidential Information - This Material is Subject to CSR's Non-disclosure Agreement
Page 53 of 114
CS-303726-DSP3
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