CYP15G0401DXB
CYV15G0401DXB
CYW15G0401DXB
Maximum Ratings
(Above which the useful life may be impaired. User guidelines
only, not tested.)
Storage Temperature .................................. –65°C to +150°C
Ambient Temperature with Power Applied....–55°C to +125°C
Supply Voltage to Ground Potential ............... –0.5V to +3.8V
DC Voltage Applied to LVTTL Outputs
in High-Z State .......................................–0.5V to VCC + 0.5V
Output Current into LVTTL Outputs (LOW)..................60 mA
DC Input Voltage....................................–0.5V to VCC + 0.5V
Static Discharge Voltage.......................................... > 2000 V
(per MIL-STD-883, Method 3015)
Latch-up Current..................................................... > 200 mA
Power-up Requirements
The CYP(V)15G0401DXB requires one power-supply. The
Voltage on any input or I/O pin cannot exceed the power pin
during power-up
Operating Range
Range
Commercial
Industrial
Ambient Temperature
0°C to +70°C
–40°C to +85°C
VCC
+3.3V ±5%
+3.3V ±5%
CYP(V)(W)15G0401DXB DC Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
Min.
Max. Unit
LVTTL-compatible Outputs
VOHT
Output HIGH Voltage
VOLT
Output LOW Voltage
IOST
Output Short Circuit Current
IOZL
High-Z Output Leakage Current
LVTTL-compatible Inputs
IOH = −4 mA, VCC = Min.
IOL = 4 mA, VCC = Min.
VOUT = 0V[21]
2.4
VCC
V
0
0.4
V
–20
–100
mA
–20
20
µA
VIHT
Input HIGH Voltage
VILT
Input LOW Voltage
IIHT
Input HIGH Current
REFCLK Input, VIN = VCC
Other Inputs, VIN = VCC
IILT
Input LOW Current
REFCLK Input, VIN = 0.0V
Other Inputs, VIN = 0.0V
IIHPDT
Input HIGH Current with internal pull-down VIN = VCC
IILPUT
Input LOW Current with internal pull-up VIN = 0.0V
LVDIFF Inputs: REFCLK±
VDIFF[22]
Input Differential Voltage
VIHHP
Highest Input HIGH Voltage
VILLP
Lowest Input LOW voltage
VCOMREF[23] Common Mode Range
Three-level Inputs
2.0
–0.5
VCC + 0.3 V
0.8
V
1.5
mA
+40
µA
–1.5
mA
–40
µA
+200
µA
–200
µA
400
VCC
mV
1.2
VCC
V
0.0
VCC/2
V
1.0
VCC – 1.2V V
VIHH
Three-level Input HIGH Voltage
Min. ≤ VCC ≤ Max.
0.87 * VCC
VCC
V
VIMM
Three-level Input MID Voltage
Min. ≤ VCC ≤ Max.
0.47 * VCC 0.53 * VCC V
VILL
Three-level Input LOW Voltage
Min. ≤ VCC ≤ Max.
0.0
0.13 * VCC V
IIHH
Input HIGH Current
VIN = VCC
200
µA
IIMM
Input MID current
VIN = VCC/2
–50
50
µA
IILL
Input LOW current
VIN = GND
–200
µA
Differential CML Serial Outputs: OUTA1±, OUTA2±, OUTB1±, OUTB2±, OUTC1±, OUTC2±, OUTD1±, OUTD2±
VOHC
Output HIGH Voltage
(VCC referenced)
100Ω differential load
150Ω differential load
VCC – 0.5 VCC – 0.2 V
VCC – 0.5 VCC – 0.2 V
Notes:
21. Tested one output at a time, output shorted for less than one second, less than 10% duty cycle.
22. This is the minimum difference in voltage between the true and complement inputs required to ensure detection of a logic-1 or logic-0. A logic-1 exists when
the true (+) input is more positive than the complement (−) input. A logic-0 exists when the complement (−) input is more positive than true (+) input.
23. The common mode range defines the allowable range of REFCLK+ and REFCLK− when REFCLK+ = REFCLK−. This marks the zero-crossing between the
true and complement inputs as the signal switches between a logic-1 and a logic-0.
Document #: 38-02002 Rev. *L
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