DM9008C View Datasheet(PDF) - Davicom Semiconductor, Inc.
Part Name
Description
MFG CO.
'DM9008C' PDF : 52 Pages View PDF
16.12 BP_ADPOK
16.11
16.10
Reserved
TX/FX
16.9
Reserved
16.8
Reserved
16.7 F_LINK_100
16.6 SPLED_CTL
16.5 COLLED_CTL
16.4 RPDCTR-EN
16.3
SMRST
16.2
MFPSC
16.1
SLEEP
16.0
RLOUT
0, RW
0, RW
1, RW
0, RO
0, RW
0, RW
0, RW
0, RW
1, RW
0, RW
1, RW
0, RW
0, RW
DM9008C
Ethernet Controller with General Processor Interface
and scrambler) bypassed
0 = Normal operation
BYPASS ADPOK
Force signal detector (SD) active. This register is for debug only,
not release to customer
1=Forced SD is OK,
0=Normal operation
Reserved
Force to 0 in application.
100BASE-TX/FX Mode Control
1 = 100BASE-TX operation
(The DM9008C does not support 100BASE-TX mode).
0 = 100BASE-FX operation
Reserved
Reserved
Force to 0 in application.
Force Good Link in 100Mbps
0 = Normal 100Mbps operation
1 = Force 100Mbps good link status
This bit is useful for diagnostic purposes
Reserved
Force to 0 in application.
Reserved
Force to 0 in application.
Reduced Power Down Control Enable
This bit is used to enable automatic reduced power down
0 = Disable automatic reduced power down
1 = Enable automatic reduced power down
Reset State Machine
When writes 1 to this bit, all state machines of PHY will be reset.
This bit is self-clear after reset is completed
MF Preamble Suppression Control
Frame preamble suppression control bit
1 = MF preamble suppression bit on
0 = MF preamble suppression bit off
Sleep Mode
Writing a 1 to this bit will cause PHY entering the Sleep mode and
power down all circuit except oscillator and clock generator circuit.
When waking up from Sleep mode (write this bit to 0), the
configuration will go back to the state before sleep; but the state
machine will be reset
Remote Loop out Control
When this bit is set to 1, the received data will loop out to the
transmit channel. This is useful for bit error rate testing
8.9 DAVICOM Specified Configuration and Status Register (DSCSR) - 17
Bit Bit Name Default
Description
Preliminary
33
Version: DM9008C-13-DS-P01
January 15, 2008
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