DM9008C View Datasheet(PDF) - Davicom Semiconductor, Inc.
Part Name
Description
MFG CO.
'DM9008C' PDF : 52 Pages View PDF
17.15
17.14
17.13
17.12
17.11
-17.9
17.8
-17.4
17.3
-17.0
100FDX
100HDX
10FDX
10HDX
Reserved
PHYADR[4
:0]
ANMB[3:0]
1, RO
1, RO
1, RO
1, RO
0, RO
(PHYADR),
RW
0, RO
DM9008C
Ethernet Controller with General Processor Interface
100M Full Duplex Operation Mode
After auto-negotiation is completed, results will be written to this bit. If this
bit is 1, it means the operation 1 mode is a 100M full duplex mode. The
software can read bit [15:12] to see which mode is selected after
auto-negotiation. This bit is invalid when it is not in the auto-negotiation
mode. (The DM9008C does not support 100bps mode).
100M Half Duplex Operation Mode
After auto-negotiation is completed, results will be written to this bit. If this
bit is 1, it means the operation 1 mode is a 100M half duplex mode. The
software can read bit [15:12] to see which mode is selected after
auto-negotiation. This bit is invalid when it is not in the auto-negotiation
mode. (The DM9008C does not support 100bps mode).
10M Full Duplex Operation Mode
After auto-negotiation is completed, results will be written to this bit. If this
bit is 1, it means the operation 1 mode is a 10M Full Duplex mode. The
software can read bit [15:12] to see which mode is selected after
auto-negotiation. This bit is invalid when it is not in the auto-negotiation
mode
10M Half Duplex Operation Mode
After auto-negotiation is completed, results will be written to this bit. If this
bit is 1, it means the operation 1 mode is a 10M half duplex mode. The
software can read bit [15:12] to see which mode is selected after
auto-negotiation. This bit is invalid when it is not in the auto-negotiation
mode
Reserved
Read as 0, ignore on write
PHY Address Bit 4:0
The first PHY address bit transmitted or received is the MSB of the
address (bit 4). A station management entity connected to multiple PHY
entities must know the appropriate address of each PHY
Auto-negotiation Monitor Bits
These bits are for debug only. The auto-negotiation status will be written
to these bits.
B3 b2 b1 B0
0 0 0 0 In IDLE state
0 0 0 1 Ability match
0 0 1 0 Acknowledge match
0 0 1 1 Acknowledge match fail
0 1 0 0 Consistency match
0 1 0 1 Consistency match fail
0 1 1 0 Parallel detects signal_link_ready
0 1 1 1 Parallel detects signal_link_ready fail
1 0 0 0 Auto-negotiation completed successfully
8.10 10BASE-T Configuration/Status (10BTCSR) - 18
Bit
18.15
Bit Name
Reserved
Default
0, RO
Reserved
Read as 0, ignore on write
Description
Preliminary
34
Version: DM9008C-13-DS-P01
January 15, 2008
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