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DM9010B View Datasheet(PDF) - Davicom Semiconductor, Inc.

Part Name
Description
MFG CO.
'DM9010B' PDF : 62 Pages View PDF
5.8 Power Pins
5,20,55,
DVDD
72,90,73
15,23,42,
GND
58,63,81,
99,76
DM9010B
Single Chip Ethernet Controller with General Processor Interface
P Digital VDD
P Digital GND
5.9 strap pins table
1: pull-high 1K~10K, 0: floating. (Default)
Pin No.
Pin Name Description
57
65
79
67
52,51,
50
78
53
54
74
75
77
MDC
EEDO
WAKE
EECS
TXD[2:0]
LINK_O
TXD[3]
TXEN
GPIO4
GPIO5
GPIO6
Polarity of INT
1: INT pin low active;
0: INT pin high active
DATA Bus Width
WAKE EEDO data width
0
0
16-bit
0
1
32-bit
1
0
8-bit
1
1
reserved
LED Mode
When it is pulled high, the LED mode is mode 1; Otherwise it is mode 0
IO base address. (not available in 32-bit mode)
IO base = (strap pin value of TXD [2:0]) * 10H + 300H
Reverse MII
1: Reverse MII mode
0: normal MII mode
External MII mode (not available in 32-bit mode)
force to external MII mode , mapping to bit 5 of REG. 2EH
and set register NCR Bit7 “1”,
Disable to load EEPROM after power on reset.
PHY Power-Up.
1: PHY is power-up after power-ON
0: PHY is power-down after power-ON
Output Type of INT
1: INT pin is Open-Collect
0: INT pin is force output
HP Auto-MDIX
0: HP Auto-MDIX turn ON
1: HP Auto-MDIX turn OFF
Preliminary
15
Version: DM9010B--DS-P01
September 5, 2007
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