DSM2180F3 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
DSM2180F3
STMicroelectronics
'DSM2180F3' PDF : 63 Pages View PDF
DSM2180F3
ARCHITECTURAL OVERVIEW
Major functional blocks are shown in Figure 5.
lows the DSP to alternatively access Flash memo-
DSP Address/Data/Control Interface
ry as data overlay memory (using DMS instead of
These DSP signals attach directly to the DSM in-
puts for a glueless connection. An 8-bit data con-
nection is formed and all 22 DSP address lines
can be decoded while the DSP operates in full
BMS). Writing Flash memory this way is faster and
requires simpler code. Note: During a DSP data
access using the DMS strobe, only the upper byte
of a 16-bit DSP data word is used.
memory mode. DSP memory strobes; BMS, DMS, DSM Flash memory sector size of 16K bytes
and IOMS are used for BDMA, data, & I/O access matches the DSP external Data Memory Overlay
respectively (no program memory access, PMS).
window size of 16K locations (two 8K windows
Flash Memory
when DMOVLAY register is used, see Analog De-
vices ADSP-218X data sheets). This alignment
The 1 Mbit (128K x 8) Flash memory is divided into provides convenient data management. Also,
eight equally-sized 16K byte sectors that are indi- each 16K byte sector can be loaded with contents
vidually selectable through the Decode PLD. Each from different firmware or data files specified in
Flash memory sector can be located at any ad- PSDsoft ExpressTM.
dress as defined by the user with PSDsoft Ex-
press. The flexibility of the Decode PLD and Page
Register logic allow the DSP to access Flash
memory as Byte DMA (BDMA) or as external data
) overlay memory across several memory pages.
t(s BDMA transfers are good for initial bootloading
and for loading internal overlay memory at run-
c time, but BDMA is not efficient writing to Flash
u memory because Flash memory is unlocked, writ-
rod ten, and status is checked one byte at a time, re-
quiring an initialization of the BDMA channel for
Obsolete Product(s) - Obsolete P each and every byte transfer. The DSM device al-
Miscellaneous: The DSP can erase Flash memory
by individual sectors or the entire Flash memory
array may be erased at one time. The Flash mem-
ory automatically goes to standby between DSP
read or write accesses to conserve power. Maxi-
mum access times include sector decoding time.
Maximum erase cycles is 100K and data retention
is 15 years minimum. Flash memory, as well as
the entire DSM device may be programmed with
the JTAG ISP interface with no DSP involvement.
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