E910.27A View Datasheet(PDF) - ELMOS Semiconductor AG
Part Name
Description
MFG CO.
'E910.27A' PDF : 50 Pages View PDF
- Preliminary -
E910.27A
Equation A:
( ) LCK ≥ VOUTPUT + Vd DSW + IOUTMAX ⋅ RDCCHOKE ⋅ TOFFM
I RIPPLE
[21]
Equation B:
( ) LCK ≥ VINPUT − VOUTPUT − IOUTMAX ⋅ (RS + RDSON + RDCCHOKE ⋅ TONM
I RIPPLE
[22]
With RDCCHOKE = choke resistance and RDSON = P-channel MOS transistor “ON” resistance.
Case A, minimum input voltage
Determine the duty cycle for minimum input voltage VS. If the duty cycle is greater than 33% take equation
A. If the duty cycle is lower than 33% take equation B.
Case B, maximum input voltage
Determine the duty cycle for maximum input votage VS. If the duty cycle is greater than 33% take equation
A. If the duty cycle is lower than 33% take equation B.
Compare the calculation results from case A and case B and take the highest inductance value. Use the
next greater standard inductance value. For optimum efficiency, the choke winding's resistance should be
not larger than the current sense resistance (RS).
Calculate peak choke current at worst case to ensure that the choke will not saturate over temperature. Fer-
rite cores saturate abruptly. Peak current can be significantly higher than output current.
IChokeSAT
≥ 1.25 ⋅ VCLIM MAX
RS MIN
[23]
Decide if your circuit can tolerate an magnetic open core geometry like a rod or barrel (drum), which have
high magnetic field radiation, or whether it needs a closed core like an U-, E- or toroid to prevent EMI prob-
lems.
8.1.4 Choosing the Input and the Output Capacitor
Choose the input capacitor CIN and the output capacitor COUT to manage the input and output peak cur-
rents with acceptable voltage ripple. The value of the output capacitor depends on the output voltage ripple
requirements as well as the maximum voltage deviation during load transients. ESR of the output capacitor
and the value of the choke are the major source of output voltage ripple, so low ESR capacitors are recom-
mended. Keep in mind that specifically standard aluminium electrolytic capacitors have a large ESR variation
over temperature and lifetime. For good EMI behaviour, the ESL of the output capacitor should also be low.
Output voltage ripple is the sum of contributions from ESL, ESR and capacitance value:
VOUT RIPPLE = VRIPPLE ESL + VRIPPLE ESR + VRIPPLE CVAL
[24]
The output voltage ripple in continuous mode due to the ESR is approximately:
VRIPPLE ESR ≈ RESR ⋅ I RIPPLE
[25]
ELMOS Semiconductor AG
Specification 28 / 50
03SP0357E.00 05.09.2006
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