E910.27A View Datasheet(PDF) - ELMOS Semiconductor AG
Part Name
Description
MFG CO.
'E910.27A' PDF : 50 Pages View PDF
- Preliminary -
E910.27A
2 Pinout
2.1 Pin Description
Name
RSIN1
RSIN2
CDRV
VSP
VSA
ENPS
SMON
VSM
SGND
AGND
VFB
RFEX
ERR
SDLY
RLEV
RSEL
WDI
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Typ c Description
A, I, HV
PFM current sense comparator input and source terminal of internal P-MOSFET. Connect current-
sense resistor between VS and RSIN. Internal power P-MOSFET is turned off when the voltage across
this resistor is equal to or greater than the current limit trip level. External filter for extensive high fre-
quency noise may be necessary.
A, I, HV
PFM current sense comparator input and source terminal of internal P-MOSFET. Connect current-
sense resistor between VS and RSIN. Internal power P-MOSFET is turned off when the voltage across
this resistor is equal to or greater than the current limit trip level. External filter for extensive high fre-
quency noise may be necessary.
A, O, HV
High side linear regulator output. CDRV provides a regulated output voltage that is VDRV below VS.
The internal power P-MOSFET gate is driven between VS and CDRV. Bypass CDRV to VS with a high
quality ceramic capacitor. There must be always a capacitor connected between VS and CDRV. In rare
circuit configurations an external schottky diode must be connected between this pad and PGND to
avoid malfunction through exessive substrat currents.
S, HV
Positive power stage supply input. Also acts as a voltage sense point for the internal current sense com-
parator. Bypass VSP to PGND with a ceramic capacitor in parallel with a low-ESR electrolytic capacitor.
S, HV Positive analog power supply input. Bypass VSA to AGND with a ceramic capacitor.
Shutdown input. Connect ENPS to VS for normal operation. Drive ENPS to false to shut the part in shut-
D, I, HV down. In shutdown mode most internal circuits are turned off. The thresholds are CMOS level compati-
ble and a small pull-down current is drawn.
D, I, HV
Active-high SMON control input. When SMON is false the internal linear regulator is already working
and can supply current to an external load. But the rest of the internal circuits are turned off. Thermal
shutdown is already working. The thresholds are CMOS level compatible and a small pull-down current
is drawn. Use this input for sequencing.
Internal linear regulator output. VSM provides power to the internal circuity and can supply a specified
A, O amount of current to an external load. Bypass VSM to AGND with a high quality ceramic and parallel
low-ESR tantal or equivalent, capacitors. All electrical specifications are valid until VSM is settled only.
S
Signal ground. SGND requires a short low noise connection to ensure good load regulation. The internal
reference is referred to this ground, so errors at this pin are multiplied by the error comparator.
S
Analog ground. AGND requires a short low noise connection to ensure good VSM regulation. The low
drop preregulator powers most of internal circuits.
Feedback input is the error comparator inverting input, and controls output voltage by adjusting switch
A, I
duty cycle. VFB also aids power good detection circuit. Connect a resistor divider between VOUTPUT,
VFB and SGND for the desired output voltage. In case of outer loop current regulation connect VFB to
an external sense resistor.
A, I
If enabled, external reference input is the error comparator noninverting input reference and controls the
voltage VOUTPUT. In this case power good, reset and watchdog functions are disabled.
D, O
Open drain logic true output for indicating an internal fault. Errors are VSM under voltage lockout, driver
voltage low and ASIC over temperature.
When true, the PFM inserts an additional delay after an overcurrent pulse. The switching frequency
D, I decreases due to the larger duty cycle. This function reduces greatly the power consumption in case of
a fault. The thresholds are CMOS level compatible.
D, I
When false selects internal high-reference voltage and when true internal low-reference voltage. The
thresholds are CMOS level compatible.
D, I
When false selects internal reference generator and when true external reference voltage input at port
RFEX. The thresholds are CMOS level compatible.
D, I
Watchdog trigger input. The rising edge of an input pulse resets the watchdog. This function is with
internal references available only. The thresholds are CMOS level compatible.
ELMOS Semiconductor AG
Specification 3 / 50
03SP0357E.00 05.09.2006
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