EM78862C View Datasheet(PDF) - ELAN Microelectronics
Part Name
Description
MFG CO.
'EM78862C' PDF : 42 Pages View PDF
EM78862C
8-Bit RISC Type Microprocessor
6.1.2 R1 (TCC)
TCC data buffer. Increased by 16.38kHz, RC/2 or by the instruction cycle clock
(controlled by CONT register).
Written and read by the program as any other register.
6.1.3 R2 (Program Counter)
The structure is depicted in Fig. 4 below.
Generates 16K × 13 on-chip PROGRAM ROM addresses to the relative
programming instruction codes.
"JMP" instruction allows the direct loading of the low 10 program counter bits.
"CALL" instruction loads the low 10 bits of the PC, PC+1, and then push it into the
stack.
"RET'' ("RETL k", "RETI") instruction loads the program counter with the contents
at the top of stack.
"MOV R2,A" allows loading of an address from the A register to the PC, and the
ninth and tenth bits are cleared to "0'.'
"ADD R2,A" allows a relative address to be added to the current PC, and contents
of the ninth and tenth bits are cleared to "0'.'
"TBL" allows a relative address to be added to the current PC, and contents of the
ninth and tenth bits do not change. The most significant bit (A10~A13) will be
loaded with the content of bit PS0 ~ PS3 in the status register (R5) upon execution
of a "JMP',' "CALL',' "ADD R2,A,', or "MOV R2,A'' instruction.
If an interrupt triggers, the PROGRAM ROM will jump to address 0008H at Page 0.
The CPU will automatically store the ACC, R3 status and R5 PAGE. It will be
restored after instruction RETI is executed.
R5(PAGE)
CALL and
INTERRUPT
PC A13 A12 A11 A10 A9 A8 A7~A0
0000
0001
PAGE0 0000~03FF
PAGE1 0400~07FF
RET
RETL
RETI
0010 PAGE2 0800~0BFF
STACK1
STACK2
STACK3
STACK4
STACK5
STACK6
STACK7
STACK8
Store
ACC,R3,R5(PAG)
Restore
1110 PAGE14 3800~3BFF
1111 PAGE15 3C00~3FFF
Fig. 4 Program Counter Organization
Product Specification (V2.1) 07.13.2005
•7
(This specification is subject to change without further notice)
Share Link: 
