EM78P569 View Datasheet(PDF) - ELAN Microelectronics
Part Name
Description
MFG CO.
'EM78P569' PDF : 58 Pages View PDF
EM78P569
8-bit OTP Micro-controller
VERSEL
(code option)
0
INS
(RA page2 bit7)
X
1
0
1
1
Instruction
ADD
ADD
ADD
SUB
SUB
SUB
A,R
R,A
A,K
A,R
R,A
A,K
ADD A , R
ADD R , A
ADD
SUB
SUB
SUB
A,K
A,R
R,A
A,K
ADD
ADD
ADD
SUB
SUB
SUB
A,R
R,A
A,K
A,R
R,A
A,K
Execute
A+R A
A+R R
A+K A
R–A A
R–A R
K–A A
A+R A
A+R R
A+K A
R–A A
R–A R
K–A A
A+R+C A
A+R+C R
A+K+C A
R – A – /C A
R – A – /C R
K – A - /C A
PAGE3 (DT2H: the Most Significant Byte ( Bit 1 ~ Bit 0 ) of Duty Cycle of PWM2)
7
6
5
4
3
2
1
0
-
-
-
-
-
- PWM2[9] PWM2[8]
R/W-0 R/W-0
Bit 0 ~ Bit 1 (PWM2[8] ~ PWM2[9]): The Most Significant Byte of PWM1 Duty Cycle
A specified value keeps the PWM1 output to stay at high until the value matches with TMR1.
Bit 2 ~ Bit 7 : (undefined) not allowed to use
RB (PORTB I/O data, ADC output data buffer, PWM2 period)
PAGE0 (PORT9 I/O data register)
7
6
5
4
3
2
1
0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
R/W
R/W
R/W
R/W R/W
R/W
R/W
R/W
Bit 0 ~ Bit 7 (PB0 ~ PB7) : 8-bit PORTB(0~7) I/O data register
User can use IOC register to define input or output each bit.
PAGE1 (ADC output data register)
7
6
5
4
3
2
1
0
AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
R
R
R
R
R
R
R
R
Bit 0 ~ Bit 7 (AD0 ~ AD7) : These 8 bit is full ADC data buffer when 8-bit resolution is selected(R7 page1 bit 2
ADREF = 0), or the least significant 8-bit data when 10 bit resolution(ADREF = 1) selected..
PAGE2(Multiplicand Y Data buffer and Data RAM’s data buffer)
Base on “VERSEL”, this page’s defined is different.
__________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
22
8/19/2004 V4.4
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