AD5680
450
VDD = VREF = 5V
400 TA = 25°C
350
300
250
200
150
100
50
0
0
4000 8000 12000 16000 20000 24000
CODE
Figure 11. Supply Current vs. Code
350
300
VDD = VREF = 5V
250
200
150
100
50
0
–40 –20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 12. Supply Current vs. Temperature
700
TA = 25°C
600
500
VDD = 5V
400
300
200
100
0
0
1
2
3
4
5
VLOGIC (V)
Figure 13. Supply Current vs. Logic Input Voltage
Data Sheet
1
2
∆: 1.52V
∆: 64.8µs
@: 1.20V
SCLK
DIN
VOUT
3
CH1 2.00V
CH3 1.00V
CH2 2.00V
M 20.0µs
CH4
Figure 14. Full-Scale Settling Time, 5 V
1.30V
VDD
1
VREF
2
VOUT
3
VOUT
C3 MAX
284mV
VOUT
C3 MIN
–52mV
CH1 3.00V CH2 3.00V
CH3 100mV
M 100µs
CH1 2.40V
Figure 15. Power-On Reset to 0 V
VDD
1
2
VREF
VOUT
3
VOUT
C3 MAX
2.5V
VOUT
C3 MIN
–40mV
CH1 3.00V CH2 3.00V
CH3 500mV
M 100µs
CH1 2.40V
Figure 16. Power-On Reset to Midscale
Rev. C | Page 8 of 20