AD5689R/AD5687R
Data Sheet
APPLICATIONS INFORMATION
MICROPROCESSOR INTERFACING
Microprocessor interfacing to the AD5689R/AD5687R is achieved
via a serial bus using a standard protocol that is compatible with
DSP processors and microcontrollers. The communications
channel requires a 3-wire or 4-wire interface consisting of a
clock signal, a data signal, and a synchronization signal. Each
device requires a 24-bit data-word with data valid on the rising
edge of SYNC.
AD5689R/AD5687R TO ADSP-BF531 INTERFACE
The SPI interface of the AD5689R/AD5687R is designed to be
easily connected to industry-standard DSPs and microcontrollers.
Figure 51 shows the AD5689R/AD5687R connected to an Analog
Devices Blackfin® DSP. The Blackfin has an integrated SPI port
that connects directly to the SPI pins of the AD5689R/AD5687R.
AD5689R/
AD5687R
ADSP-BF531
which provide a low impedance path to ground at high frequencies
to handle transient currents due to internal logic switching.
In systems where there are many devices on one board, it is
often useful to provide some heat sinking capability to allow
the power to dissipate easily.
Each AD5689R or AD5687R has an exposed paddle beneath the
device. Connect this paddle to the GND supply for the part. For
optimum performance, use special considerations to design the
motherboard and to mount the package. For enhanced thermal,
electrical, and board level performance, solder the exposed paddle
on the bottom of the package to the corresponding thermal land
paddle on the PCB. Design thermal vias into the PCB land paddle
area to further improve heat dissipation.
The GND plane on the device can be increased (as shown in
Figure 53) to provide a natural heat sinking effect.
AD5689R/
AD5687R
SPISELx
SCK
MOSI
PF9
PF8
SYNC
SCLK
SDIN
LDAC
RESET
GND
PLANE
Figure 51. ADSP-BF531 Interface to the AD5689R/AD5687R
AD5689R/AD5687R TO SPORT INTERFACE
BOARD
The Analog Devices ADSP-BF527 has one SPORT serial port.
Figure 53. Paddle Connection to Board
Figure 52 shows how one SPORT interface can be used to
control the AD5689R/AD5687R.
GALVANICALLY ISOLATED INTERFACE
In many process control applications, it is necessary to provide
AD5689R/
AD5687R
an isolation barrier between the controller and the unit being
controlled to protect and isolate the controlling circuitry from
ADSP-BF527
SPORT_TFS
SPORT_TSCK
SPORT_DTO
SYNC
SCLK
SDIN
any hazardous common-mode voltages that may occur. The
iCoupler® products from Analog Devices provide voltage isolation
in excess of 2.5 kV. The serial loading structure of the AD5689R/
AD5687R makes these parts ideal for isolated interfaces because
GPIO0
GPIO1
LDAC
RESET
the number of interface lines is kept to a minimum. Figure 54
shows a 4-channel isolated interface to the AD5689R/AD5687R
Figure 52. SPORT Interface to the AD5689R/AD5687R
LAYOUT GUIDELINES
In any circuit where accuracy is important, careful consideration of
the power supply and ground return layout helps to ensure the
rated performance. Design the PCB on which the AD5689R/
AD5687R are mounted so that the AD5689R/AD5687R lie on
the analog plane.
using an ADuM1400. For additional information, visit
www.analog.com/icouplers.
CONTROLLER
SERIAL VIA
CLOCK IN
ADuM14001
ENCODE
DECODE
VOA TO
SCLK
SERIAL VIB
DATA OUT
ENCODE
DECODE
VOB TO
SDIN
Provide the AD5689R/AD5687R with ample supply bypassing
of 10 μF in parallel with 0.1 μF on each supply, located as close
VIC
SYNC OUT
ENCODE
DECODE
VOC TO
SYNC
to the package as possible, ideally right up against the device.
The 10 μF capacitor is of the tantalum bead type. Use a 0.1 μF capa-
LOAD DAC VID
OUT
ENCODE
DECODE
VOD TO
LDAC
citor with low effective series resistance (ESR) and low effective
series inductance (ESI), such as the common ceramic types,
1ADDITIONAL PINS OMITTED FOR CLARITY.
Rev. B | Page 26 of 28
Figure 54. Isolated Interface