AD7763
DRIVING THE AD7763
The AD7763 has an on-chip differential amplifier that operates
with a supply voltage (AVDD3) from 3.15 V to 5.25 V. For a 4.096 V
reference, the supply voltage must be 5 V.
To achieve the specified performance in normal mode, the
differential amplifier should be configured as a first-order
antialias filter, as shown in Figure 31. Any additional filtering
should be carried out in previous stages using low noise, high
performance op amps, such as the AD8021.
Suitable component values for the first-order filter are shown in
Table 10. The values in Table 10 yield a 10 dB attenuation at the
first alias point of 19 MHz.
CFB
RFB
RIN
A
CS
A1
B
RIN
RFB
RM
VIN–
RM
VIN+
CFB
Figure 31. Differential Amplifier Configuration
Table 10. Normal Mode Component Values
VREF
RIN
RFB
RM
CS
4.096 V 1 kΩ
655 Ω 18 Ω
5.6 pF
CFB
33 pF
Figure 32 shows the signal conditioning that occurs using the
circuit in Figure 18 with a ±2.5 V input signal biased around
ground and having the component values and conditions in
Table 10.
The differential amplifier always biases the output signal to sit
on the optimum common mode of VREF/2, in this case, 2.048 V.
The signal is also scaled to give the maximum allowable voltage
swing with this reference value. This is calculated as 80% of
VREF; that is, 0.8 × 4.096 V ≈ 3.275 V p-p on each input.
To obtain maximum performance from the AD7763, it is
advisable to drive the ADC with differential signals. Figure 33
shows how a bipolar, single-ended signal biased around ground
can drive the AD7763 with the use of an external op amp, such as
the AD8021.
With a 4.096 V reference, a 5 V supply must be provided to the
reference buffer (AVDD4). With a 2.5 V reference, a 3.3 V supply
must be provided to AVDD4.
Data Sheet
+2.5V
0V
A
–2.5V
+3.685V
+2.048V
+0.410V
VIN+
+2.5V
B
0V
+3.685V
+2.048V
VIN–
–2.5V
+0.410V
Figure 32. Differential Amplifier Signal Conditioning
CFB
2R
RFB
2R
VIN
RIN
AD8021
RM
VIN–
R
CS
A1
RM
VIN+
RIN
RFB
CFB
Figure 33. Single-Ended-to-Differential Conversion
VIN+
CPA
SS1
CS1
SH3
SH1
SS3
CPB1
ANALOG
MODULATOR
SS2
CS2
SH4
SH2
SS4
CPB2
Figure 34. Equivalent Input Circuit
The AD7763 employs a double sampling front end, as shown in
Figure 34. For simplicity, only the equivalent input circuit for
VIN+ is shown. The equivalent input circuitry for VIN− is the same.
Rev. B | Page 20 of 32