AD7960
2.5
2.0
GAIN ERROR
1.5
1.0
ZERO ERROR
0.5
0
–40 –20
0
20
40
60
TEMPERATURE (°C)
80
100
Figure 23. Zero Error and Gain Error vs. Temperature, REF = 5 V
0.3
0.2
0.1
0
IN+
–0.1
–0.2
IN–
–0.3
–0.4
–0.5
–0.6
–0.7
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
DIFFERENTIAL INPUT VOLTAGE (V)
Figure 24. Input Current (IN+, IN−) vs. Differential Input Voltage, REF = 5 V
14
12
VDD2
10
8
6
VIO
4
VDD1
2
0
–40
–20
0
20
40
60
80
TEMPERATURE (°C)
Figure 25. Supply Current vs. Temperature, REF = 5 V, Self Clocked Mode,
CNV± in CMOS Mode, Internal Reference Buffer Disabled
Data Sheet
10
VDD2
VDD1
VIO
8
6
4
2
0
–40
–20
0
20
40
60
80
TEMPERATURE (°C)
Figure 26. Power-Down Current vs. Temperature, REF = 5 V
12
10
VDD2
8
6
VIO
4
2
VDD1
0
0
1
2
3
4
5
THROUGHPUT (MHz)
Figure 27. Supply Current vs. Throughput, Self Clocked Mode, CNV± in CMOS
Mode, Internal Reference Buffer Disabled
Rev. C | Page 12 of 24