EVM4717DBG View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'EVM4717DBG' PDF : 22 Pages View PDF
TEST AND MEASUREMENT PRODUCTS
Circuit Description (continued)
Edge4717D
TEST CONDITION
COMP_IN > IVMAX
COMP_IN < IVMAX
COMP_IN > IVMIN
COMP_IN < IVMIN
COMP_IN < IVMAX
and
COMP_IN > IVMIN
DUT LTH
0
1
N/A
1
DUT GTL
N/A
1
0
1
Clamp Condition
Clamp Diode
Current
OPEN_RLY
SRC_OUT < FORCE–Vdiode
N/A
1
SRC_OUT > FORCE–Vdiode
ICLAMP > 55 mA
ICLAMP < 55 mA
0
1
SNK_OUT < FORCE+Vdiode
ICLAMP > 55 mA
ICLAMP < 55 mA
0
1
SNK_OUT > FORCE+Vdiode
N/A
1
Table 7. Comparator Truth Table
REXT Selection
The Edge4717D is designed such that the maximum
voltage drop across REXT (RA, RB, RC, or RD depending
on range selected using RS0 and RS1 inputs) is ≤ 2V.
Resistor values can be chosen to operate the PMU at any
current range up to ± 50 mA in accordance with the
following equation:
REXT[Ω] = 2 [V] , IMAX ≤ 50 mA for Range D
IMAX[A] IMAX ≤ 2 mA for Range C
IMAX ≤ 80 µA for Range B
IMAX ≤ 3.2 mA for Range A
Voltage Clamps/Over-Current Detection
The Edge4717D features four pairs of on-board clamps
(one pair per channel), which can be used to clamp the
voltage of pins connected to SRC_OUT and SNK_OUT
between limits set by the voltages applied to SRC_MON
and SNK_MON. SNK_MON is a high impedance input
that establishes the upper clamping limit, while SRC_MON
is a high impedance analog input that establishes the lower
clamping limit. In addition to voltage clamping functionality,
the clamp circuitry of the Edge4717D also features over-
current detection capability. Over-current detection is only
enabled when one of the voltage clamping thresholds is
exceeded (FORCE + Vdiode > SNK_MON or FORCE –
Vdiode < SRC_MON). When enabled, an over-current
condition is signaled via the OPEN-RLY pin. OPEN_RLY is
an open drain output pin that pulls down when an over-
current condition is detected. OPEN_RLY functionality is
depicted in Table 8.
Table 8. Over-Current Detection Circuit Functionality
(Vdiode is the forward voltage of the
external clamp diode).
For applications that require the use of external resistors
that are much smaller in Ohmic value than those that are
outlined in Table 2, one will need to account for the
variation in switch resistance vs. common mode voltage
of the range selection switches (A-D in Figure 3) when
specifying the overall accuracy of the application.
Common Mode Error/Calibration
In order to attain a high degree of accuracy in a typical
ATE application, offset and gain errors are accounted for
through software calibration. When operating the
Edge4717D in the Measure Current (MI) or Force Current
(FI) modes, an additional source of error, common mode
error, should be accounted for. Common mode error is a
measure of how the common mode voltage, VCM, at the
input of the current sense amplifier affects the forced or
measured current values (see Figure 2). Since this error
is created by internal resistors in the current sense
amplifier, it is very linear in nature.
Using the common mode error and common mode linearity
specifications, one can see that with a small number of
calibration steps (see Applications note PMU-A1), the
effect of this error can be significantly reduced.
2005 Semtech Corp. / Rev. 5, 10/14/05
9
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