2.3.2.Read/Write Operation Sequence (VRAM)
READ
VCC1=4.5~5.5V
Parameter
Symbol
Min.
Max.
AB[15:0] and MEMCS valid before MEMRD↓
t1
0
-
AB[15:0] and MEMCS hold from MEMRD ↑
t2
0
-
MEMRD↓ to READY↓
t3
-
20
READY↑ to DB[7:0] valid
t4
-
10
DB[7:0] hold from MEMRD↑
t5
-
10
MEMRD↑ to DB[7:0] Hi-z delay
t6
-
20
READY negated pluse width
t7
-
3.5×MCLK+10
MCLK=1/fosc or 2/fosc depending on which display mode the chip is in. (See section 2.3.3.)
Units
ns
ns
ns
ns
ns
ns
ns
AB[15:0]
VALID
MEMCS
t1
t2
MEMRD
t3
t7
Hi-z
READY
Hi-z
t4
t6
t5
DB[0:7]
Hi-z
VALID
Hi-z
WRITE
VCC1=4.5~5.5V
Parameter
Symbol
Min.
Max.
AB[15:0] and MEMCS valid before MEMWR↓
t1
0
-
AB[15:0] and MEMCS hold from MEMWR↑
t2
0
-
MEMWR↓ to READY↓
t3
-
20
MEMWR↓ to DB[7:0] valid
t4
-
MCLK-20
DB[7:0] hold from MEMWR↑
t5
0
-
READY negated pluse width
t6
-
3.5×MCLK+10
MCLK=1/fosc or 2/fosc depending on which display mode the chip is in. (See section 2.3.3.)
Units
ns
ns
ns
ns
ns
ns
AB[15:0]
MEMCS
MEMWR
READY
DB[0:7]
VALID
t1
t2
t3
t6
Hi-Z
t4
Hi-Z
Hi-Z
t5
VALID
Hi-Z
F-51168NCU-FW-AA (AA) No.2000-0140
OPTREX CORPORATION
OPTREX
Page 5/18