FDC37N869 View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
MFG CO.
FDC37N869
SMSC -> Microchip
'FDC37N869' PDF : 147 Pages View PDF
LINE CONTROL REGISTER (LCR)
The Line Control register (Address Offset = 3H, DLAB = 0, READ/WRITE) contains the formatting information for the
serial line.
Word Length Select, Bits 0 - 1
The Word Length Select bits specify the number of bits in each transmitted or received serial character. Note: the
Start, Stop and Parity bits are not included in the word length. The encoding of the Word Length bits is shown in
Table 51.
Table 51 - Word Length Encoding
WORD LENGTH
SELECT
WORD LENGTH (Bits)
Bit 1 Bit 0
0
0
5
0
1
6
1
0
7
1
1
8
Stop Bits, Bit 2
The Stop Bits bit specifies the number of stop bits in each transmitted or received serial character. Table 52
describes the Stop Bits encoding.
Table 52 - STOP Bit Encoding
STOP BITS
WORD
NUMBER OF
(Bit 2)
LENGTH STOP BITS
0
-
1
0
5 Bits
1.5
1
6 Bits
2
1
7 Bits
2
1
8 Bits
2
Note: The receiver ignores stop bits beyond the first, regardless of the number of stop bits used in transmitting.
Parity Enable, Bit 3
When the Parity Enable bit is a logic “1” a parity bit is generated (transmit data) or checked (receive data) between
the last data word bit and the first stop bit of the serial data. The parity bit is used to generate an even or odd
number of 1s when the data word bits and the parity bit are summed.
Even Parity Select, Bit 4
When the Even Parity Select (EPS) bit is a logic “0” and the Parity Enable is a logic “1”, an odd number of logic “1”’s
is transmitted or checked in the data word and the parity bit. When the Parity Enable is a logic “1” and the EPS bit
is a logic “1” an even number of bits is transmitted and checked.
Stick Parity, Bit 5
When the Stick Parity bit is a logic “1” and the Parity Enable is a logic “1”, the parity bit is transmitted and then
detected by the receiver in the opposite state indicated by the EPS bit.
Set Break, Bit 6
When the Set Break Control bit is a logic “1”, the transmit data output (TXD) is forced to the Spacing or logic “0”
state and remains there until reset by a low level bit 6, regardless of other transmitter activity. This feature enables
the Serial Port to alert a terminal in a communications system.
SMSC DS – FDC37N869
Page 63
Rev. 11/09/2000
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