GL852G View Datasheet(PDF) - Genesys Logic
Part Name
Description
MFG CO.
'GL852G' PDF : 38 Pages View PDF
GL852G Datasheet
5.2.5 EEPROM Setting
GL852G replies to host commands by the default settings in the internal ROM. GL852G also offers the
ability to reply to the host according to the settings in the external EEPROM (LQFP48/LQFN46 supports
both 93C46 and 24C02; QFN28 only supports 24C02). And to prevent the content of EEPROM from being
over-written, amber LED will be disabled when EEPROM exists. The detail setting information please refers
to the GL852G AP Note_EEPROM Info document.
The schematics between GL852G and 93C46 are depicted in the following figures:
Figure 5.9 - Schematics between GL852G and 93C46
GL852G firstly verifies the check sum after power on reset. If the check sum is correct, GL852G will take
the configuration of 93C46 as part of the descriptor contents. To prevent the content of 93C46 from being
over-written, amber LED will be disabled when 93C46 exists.
5.2.6 Power Switch Enable Polarity (Only Available for LQFP48/LQFN46 Package)
Both low/high-enabled power switches are supported. It is determined by jumper setting, based on the state
of pin AMBER2, as the following table:
Table 5.1 - Configuration by Power Switch Type
AMBER2
Power Switch Enable Polarity
0
Low-active
1
High-active
5.2.7 Port Number Configuration (Only Available for LQFP48/LQFN46 Package)
Number of downstream port can be configured as 2/3/4 ports by pin strapping in addition to EEPROM,
based on the state of pin AMBER 3, AMBER 4, as the following table:
Table 5.2 - Port Number Configuration
AMBER 3 AMBER 4
# of DP Declaration
1
1
1 (Port1)
1
0
2 (Port1/2)
0
1
3 (Port1/2/3)
0
0
4 (Port1/2/3/4)
©2012 Genesys Logic, Inc. - All rights reserved.
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