HDNS-2200 View Datasheet(PDF) - Agilent Technologies, Inc
Part Name
Description
MFG CO.
'HDNS-2200' PDF : 36 Pages View PDF
Forcing the SDIO Line to the
Hi-Z State
There are times when the SDIO
line from the ADNS-2030 should be
in the Hi-Z state. If the micropro-
cessor has completed a write to the
ADNS-2030, the SDIO line is Hi-Z,
since the SDIO pin is still config-
ured as an input. However, if the
last operation from the micropro-
cessor was a read, the ADNS-2030
will hold the D0 state on SDIO
until a falling edge of SCLK.
To place the SDIO pin into the
Hi-Z state, first raise the PD pin
for 100 µs (min). The PD pin can
stay high, with the ADNS-2030 in
the shutdown state, or the PD
pin can be lowered, returning the
ADNS-2030 to normal operation.
In either case, the SDIO line will
now be in the Hi-Z state.
100µs
PD
SDIO
Hi-Z
Figure 29. SDIO Hi-Z state and timing.
Required Timing Between Read and
Write Commands
There are minimum timing
requirements between read and
write commands on the serial
port. See Figure 30.
If the rising edge of SCLK for the
last data bit of the second write
command occurs before the
100 microsecond required delay,
then the first write command
may not complete correctly. See
Figure 31.
If the rising edge of SCLK for the
last address bit of the read
command occurs before the
100 microsecond required delay,
then the write command may not
complete correctly. See Figure 32.
SCLK
Address
Data
Write Operation
Figure 30. Timing between two write commands.
t SWW
≥100 µs
Address
Data
Write Operation
SCLK
Address
Data
Write Operation
Figure 31. Timing between write and read commands.
t SWR
≥100 µs
SCLK
Address
t HOLD
≥100 µs
Read Operation
Figure 32. Timing between read and either write or subsequent read commands.
Address
Next Read
Operation
tSRW and tSRR
>120 ns
Data
Address
Next Read or
Write Operation
18
Share Link: 
