HT56R26 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT56R26' PDF : 134 Pages View PDF
HT56R22/HT56R23/HT56R24/HT56R25/HT56R26
SPI Configuration Options
A configuration option is provided for an overall on/off
control for the SPI bus. Additional configuration options
are provided to enable operation of the WCOL1 bit
which is the write collision bit and the CSEN1 bus select
bit.
Peripheral Clock Output
The Peripheral Clock Output allows the device to supply
external hardware with a clock signal synchronised to
the microcontroller clock.
Peripheral Clock Operation
As the peripheral clock output pin, PCK, is shared with
an I/O line, the required pin function is chosen via
PCKEN in the SIMC0 register. The Peripheral Clock
function is controlled using the SIMC0 register. The
clock source for the Peripheral Clock Output can origi-
nate from either the Timer/Event Counter 0 or a divided
ratio of the internal fSYS clock. The PCKEN bit in the
SIMC0 register is the overall on/off control, setting
PCKEN bit to 1 enables the Peripheral Clock, setting
PCKEN bit to 0 disables it. The required division ratio of
the system clock is selected using the PCKP1 and
PCKP0 bits in the same register. If the device enters the
SLEEP Mode this will disable the Peripheral Clock out-
put.
· SIMC0 Register
Bit
7
6
5
4
3
2
1
0
Name
SIM2
SIM1
SIM0
PCKEN PCKP1 PCKP0 SIMEN
¾
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
¾
POR
1
1
1
0
0
0
0
¾
Bit 7~5
Bit 4
Bit 3~2
Bit 1
Bit 0
SIM2, SIM1, SIM0: SIM operating mode control described in SIM section
PCKEN: PCK output pin control
0: Disable
1: Enable
PCKP1, PCKP0: select PCK output pin frequency
00: fSYS
01: fSYS/4
10: fSYS/8
11: TM0 CCRP match frequency/2
SIMEN: SIM control described in SIM section
unimplemented, read as ²0²
Rev. 1.30
80
December 26, 2014
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