HT66F016 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT66F016' PDF : 116 Pages View PDF
HT66F016/HT66F017/HT68F016/HT68F017
HT66F016R/HT66F017R/HT68F016R/HT68F017R
STM Register List
Name
TM1C0
TM1C1
TM1DL
TM1DH
TM1AL
TM1AH
TM1RP
Bit7
T1PAU
T1M1
D7
D15
D7
D15
T1RP7
Bit6
T1CK2
T1M0
D6
D14
D6
D14
T1RP6
Bit5
T1CK1
T1IO1
D5
D13
D5
D13
T1RP5
Bit4
T1CK0
T1IO0
D4
D12
D4
D12
T1RP4
Bit3
T1ON
T1OC
D3
D11
D3
D11
T1RP3
Bit2
¾
T1POL
D2
D10
D2
D10
T1RP2
Bit1
¾
T1DPX
D1
D9
D1
D9
T1RP1
Bit0
¾
T1CCLR
D0
D8
D0
D8
T1RP0
· TM1C0 Register
16-bit Standard TM Register List
Bit
7
6
5
4
3
2
1
0
Name
T1PAU T1CK2 T1CK1 T1CK0
T1ON
¾
¾
¾
R/W
R/W
R/W
R/W
R/W
R/W
¾
¾
¾
POR
0
0
0
0
0
¾
¾
¾
Bit 7
Bit 6~4
Bit 3
Bit 2~0
T1PAU: TM1 counter pause control
0: run
1: pause
The counter can be paused by setting this bit high. Clearing the bit to zero restores normal
counter operation. When in a Pause condition the TM will remain powered up and continue to
consume power. The counter will retain its residual value when this bit changes from low to high
and resume counting from this value when the bit changes to a low value again.
T1CK2~T1CK0: select TM1 counter clock
000: fSYS/4
001: fSYS
010: fH/16
011: fH/64
100: fTBC
101: fH/8
110: TCK1 rising edge clock
111: TCK1 falling edge clock
These three bits are used to select the clock source for the TM. The external pin clock source can
be chosen to be active on the rising or falling edge. The clock source fSYS is the system clock,
while fH and fTBC are other internal clocks, the details of which can be found in the oscillator section.
T1ON: TM1 counter On/Off control
0: Off
1: On
This bit controls the overall on/off function of the TM. Setting the bit high enables the counter to
run, clearing the bit disables the TM. Clearing this bit to zero will stop the counter from counting
and turn off the TM which will reduce its power consumption. When the bit changes state from
low to high the internal counter value will be reset to zero, however when the bit changes from
high to low, the internal counter will retain its residual value until the bit returns high again.
If the TM is in the Compare Match Output Mode then the TM output pin will be reset to its initial
condition, as specified by the T1OC bit, when the T1ON bit changes from low to high.
unimplemented, read as 0
Rev. 1.40
63
November 22, 2016
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