HT66F016 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT66F016' PDF : 116 Pages View PDF
HT66F016/HT66F017/HT68F016/HT68F017
HT66F016R/HT66F017R/HT68F016R/HT68F017R
Single Pulse Mode
To select this mode, bits TnM1 and TnM0 in the TMnC1
register should be set to 10 respectively and also the
TnIO1 and TnIO0 bits should be set to 11 respectively.
The Single Pulse Output Mode, as the name suggests,
will generate a single shot pulse on the TM output pin.
The trigger for the pulse output leading edge is a low to
high transition of the TnON bit, which can be imple-
mented using the application program. However in the
Single Pulse Mode, the TnON bit can also be made to
S /W C o m m a n d
S E T "T n O N "
or
T C K n P in T r a n s itio n
L e a d in g E d g e
T n O N b it
0® 1
automatically change from low to high using the external
TCKn pin, which will in turn initiate the Single Pulse out-
put. When the TnON bit transitions to a high level, the
counter will start running and the pulse leading edge will
be generated. The TnON bit should remain high when
the pulse is in its active state. The generated pulse trail-
ing edge will be generated when the TnON bit is cleared
to zero, which can be implemented using the application
program or when a compare match occurs from Com-
parator A.
T r a ilin g E d g e
T n O N b it
1® 0
S /W C o m m a n d
C L R "T n O N "
or
C C R A M a tc h C o m p a re
T M n O u tp u t P in
P u ls e W id th = C C R A V a lu e
Single Pulse Generation
Counter Value
CCRA
CCRP
Counter stopped
by CCRA
TnM [1:0] = 10 ; TnIO [1:0] = 11
Counter Reset when
TnON returns high
Pause Resume
Counter Stops
by software
TnON
TCKn pin
TnPAU
Software Cleared by
Trigger CCRA match
Auto. set by
TCKn pin
Software
Trigger
TCKn pin
Trigger
TnPOL
CCRP Int.
Flag TnPF
CCRA Int.
Flag TnAF
No CCRP Interrupts
generated
Time
Software
Trigger
Software
Software
Trigger
Clear
TM O/P Pin
(TnOC=1)
TM O/P Pin
(TnOC=0)
Pulse Width
set by CCRA
Single Pulse Mode
Output Inverts
when TnPOL = 1
Note:
1. Counter stopped by CCRA
2. CCRP is not used
3. The pulse triggered by the TCKn pin or by setting the TnON bit high
4. A TCKn pin active edge will automatically set the TnON bit high.
5. In the Single Pulse Mode, TnIO [1:0] must be set to ²11² and can not be changed.
Rev. 1.40
71
November 22, 2016
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