HT66F016 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT66F016' PDF : 116 Pages View PDF
HT66F016/HT66F017/HT68F016/HT68F017
HT66F016R/HT66F017R/HT68F016R/HT68F017R
· Step 5
If the interrupts are to be used, the interrupt control
registers must be correctly configured to ensure the
A/D converter interrupt function is active. The master
interrupt control bit, EMI, and the A/D converter inter-
rupt bit, ADE, must both be set to high to do this.
· Step 6
The analog to digital conversion process can now be
initialised by setting the START bit in the ADCR0 reg-
ister from low to high and then to low again. Note that
this bit should have been originally cleared to 0.
· Step 7
To check when the analog to digital conversion pro-
cess is complete, the EOCB bit in the ADCR0 register
can be polled. The conversion process is complete
when this bit goes low. When this occurs, the A/D data
registers ADRL and ADRH can be read to obtain the
conversion value. As an alternative method if the in-
terrupts are enabled and the stack is not full, the pro-
gram can wait for an A/D interrupt to occur.
Note: When checking for the end of the conversion
process, if the method of polling the EOCB bit in the
ADCR0 register is used, the interrupt enable step
above can be omitted.
The accompanying diagram shows graphically the vari-
ous stages involved in an analog to digital conversion
process and its associated timing. After an A/D conver-
sion process has been initiated by the application pro-
gram, the microcontroller internal hardware will begin to
carry out the conversion, during which time the program
can continue with other functions. The time taken for the
A/D conversion is 16tADCK where tADCK is equal to the A/D
clock period.
Programming Considerations
During microcontroller operates where the A/D con-
verter is not being used, the A/D internal circuitry can be
switched off to reduce power consumption, by setting bit
ADOFF high in the ADCR0 register. When this happens,
the internal A/D converter circuits will not consume
power irrespective of what analog voltage is applied to
their input lines. If the A/D converter input lines are used
as normal I/Os, then care must be taken as if the input
voltage is not at a valid logic level, then this may lead to
some increase in power consumption.
The power-on reset condition of the A/D converter con-
trol registers will ensure that the shared function pins
are setup as A/D converter inputs. If any of the A/D con-
verter input pins are to be used for functions, then the
A/D converter control register bits must be properly
setup to disable the A/D input configuration.
A/D Transfer Function
As the devices contain a 12-bit A/D converter, its
full-scale converted digitised value is equal to FFFH.
Since the full-scale analog input value is equal to the
VDD or VREF voltage, this gives a single bit analog input
value of VDD or VREF divided by 4096.
1 LSB= (VDD or VREF) ¸ 4096
The A/D Converter input voltage value can be
calculated using the following equation:
A/D input voltage =
A/D output digital value ´ (VDD or VREF) ¸ 4096
The diagram shows the ideal transfer function between
the analog input value and the digitised output value for
the A/D converter. Except for the digitised zero value,
the subsequent digitised values will change at a point
0.5 LSB below where they would change without the off-
set, and the last full scale digitised value will change at a
point 1.5 LSB below the VDD or VREF level.
A/D Programming Example
The following two programming examples illustrate how
to setup and implement an A/D conversion. In the first
example, the method of polling the EOCB bit in the
ADCR0 register is used to detect when the conversion
cycle is complete, whereas in the second example, the
A/D interrupt is used to determine when the conversion
is complete.
Rev. 1.40
79
November 22, 2016
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