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HT66F016 View Datasheet(PDF) - Holtek Semiconductor

Part Name
Description
MFG CO.
HT66F016
Holtek
Holtek Semiconductor Holtek
'HT66F016' PDF : 116 Pages View PDF
HT66F016/HT66F017/HT68F016/HT68F017
HT66F016R/HT66F017R/HT68F016R/HT68F017R
A/D Converter Control Registers -
ADCR0, ADCR1, ACERL
To control the function and operation of the A/D con-
verter, three control registers known as ADCR0, ADCR1
and ACERL are provided. These 8-bit registers define
functions such as the selection of which analog channel
is connected to the internal A/D converter, the digitised
data format, the A/D clock source as well as controlling
the start function and monitoring the A/D converter end
of conversion status. The ACS1~ACS0 bits in the
ADCR0 register and ACS4 bit is the ADCR1 register de-
fine the ADC input channel number. As the device con-
tains only one actual analog to digital converter
hardware circuit, each of the individual 4 analog inputs
must be routed to the converter. It is the function of the
ACS4 and ACS1~ACS0 bits to determine which analog
channel input pins or internal 1.25V is actually con-
nected to the internal A/D converter.
The ACERL control register contains the
ACER3~ACER0 bits which determine which pins on
PA0~PA3 are used as analog inputs for the A/D con-
verter input and which pins are not to be used as the A/D
converter input. Setting the corresponding bit high will
select the A/D input function, clearing the bit to zero will
select either the I/O or other pin-shared function. When
the pin is selected to be an A/D input, its original function
whether it is an I/O or other pin-shared function will be
removed. In addition, any internal pull-high resistors
connected to these pins will be automatically removed if
the pin is selected to be an A/D input.
A C E 3~A C E 0
P A 0 /A N 0
P A 1 /A N 1
P A 2 /A N 2
P A 3 /A N 3
1 .2 5 V
V 125E N
fS Y S
V DD
A D C K 2~A D C K 0
A /D
¸2N
(N = 0 ~ 6 )
AD O FF
C lo c k B it
P A 1 /V R E F
VR EFS
B it
A /D C o n v e rte r
A /D R e fe r e n c e V o lta g e
ADRL
ADRH
A /D D a ta
R e g is te r s
V SS
A C S 4,
A C S 1~A C S 0
STAR T EO C B AD O FF
A/D Converter Structure
AD R FS
b it
Rev. 1.40
74
November 22, 2016
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