ICS1893BYI-10LF View Datasheet(PDF) - Integrated Circuit Systems
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MFG CO.
'ICS1893BYI-10LF' PDF : 143 Pages View PDF
ICS1893BY-10 - Release
Chapter 9 DC and AC Operating Conditions
9.5.5 10M MII: Synchronous Transmit Timing
Table 9-12 lists the significant time periods for the 10M MII synchronous transmit timing. The time periods
consist of timings of signals on the following pins:
• TXCLK
• TXD[3:0]
• TXEN
• TXER
Figure 9-6 shows the timing diagram for the time periods.
Table 9-12. 10M MII: Synchronous Transmit Timing
Time
Period
Parameter
Conditions Min. Typ. Max. Units
t1 TXD[3:0], TXEN, TXER Setup to TXCLK Rise
–
375 –
–
ns
t2 TXD[3:0], TXEN, TXER Hold after TXCLK Rise
–
0
–
–
ns
Figure 9-6. 10M MII Synchronous Transmit Timing Diagram
TXCLK
TXD[3:0]
TXEN
TXER
t1
t2
ICS1893BY-10 Rev A 3/24/04
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
123
March, 2004
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