ICS1893CY-10LF View Datasheet(PDF) - Integrated Circuit Systems
Part Name
Description
MFG CO.
'ICS1893CY-10LF' PDF : 143 Pages View PDF
ICS1893CY-10 - Release
Chapter 8 Pin Diagram, Listings, and Descriptions
Table 8-6. MAC/Repeater Interface Pins: 100M Symbol Interface (Continued)
MII Pin 100M Pin
Name Symbol No.
Pin
Name
Pin
Type
Pin Description
RXD0
RXD1
RXD2
RXD3
SRD0
SRD1
SRD2
SRD3
35 Output Symbol Receive Data 0–3.
34
In 100M Symbol mode:
33
• The ICS1893CY-10’s SRD0 pin transmits the
32
least-significant bit and the SRD4 pin transmits the
most-significant bit of the symbol received from its
MAC/Repeater interface.
• The ICS1893CY-10 continually transfers the data it receives
from its MDI to its SRD[4:0] pins (that is, to its MAC/Repeater
Interface). In the 100M Symbol mode, data is not framed.
Therefore, the ICS1893CY-10 does not assert its RXDV
signal.
• The ICS1893CY-10 transfers its receive data to the SRD[4:0]
pins synchronously on the rising edges of its SRCLK signal.
RXDV –
36
No Receive Data Valid.
Connect For the 100M Symbol Interface, this pin is a no connect. For
more information, see Table 5-1.
RXER
RXTRI
SRD4
TXCLK STCLK
TXD0
TXD1
TXD2
TXD3
STD0
STD1
STD2
STD3
TXEN –
TXER STD4
39 Output Symbol Receive Data 4.
41 Input Receive (Interface), Tri-State.
This pin’s input is from a MAC. When this pin’s signal is logic:
• Low, the MAC indicates it is not in a tri-state condition.
• High, the MAC indicates it is in a tri-state condition. In this
case, the ICS1893CY-10 acts to ensure that only one PHY is
active at a time. (A PHY address of 00 also tri-states the MII
interface.)
43 Output Symbol Transmit Clock.
This pin’s description is the same as that given in Table 8-5.
45 Input Symbol Transmit Data 0–3.
46
In 100M Symbol mode:
47
• The ICS1893CY-10 STD0 pin receives the least-significant
48
bit and the STD4 pin receives the most-significant bit of the
symbol received from the MAC/Repeater interface.
• The signals on the ICS1893CY-10 STD[4:0] pins are
continually and synchronously sampled on the rising edges
of its STCLK. These signals are independent of the TXEN
signal.
Note: In 100M Symbol mode, TXEN is not used because the
MAC/Repeater is responsible for sending both IDLE
symbols and data.
44
No Transmit Enable.
Connect For the 100M Symbol Interface, this pin is a no connect. For
more information, see Table 5-1.
42 Input Symbol Transmit Data 4.
This pin’s description is the same as that given in Table 8-5.
ICS1893CY-10 Rev 1/07
Copyright © 2007, Integrated Device Technology, Inc.
All rights reserved.
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