IR3Y48M View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
'IR3Y48M' PDF : 31 Pages View PDF
Serial Interface Circuit
The internal registers of IR3Y48M are controlled
through 3-wire serial interface.
The 16-bit length control data consists of 2-bit
operation code, 4-bit address, and 10-bit data. The
controller should set each bit synchronizing to SCK
falling since IR3Y48M (receiver) acquire data at
SCK rising edge. The data is valid while CSN is
low.
IR3Y48M
The written data comes effective at rising edge of
CSN.
Fix CSN to high when no access is conducted.
It is forbidden to write data to the address that is
not listed.
Always give 16 times SCK rising during CSN low.
All data are ignored when SCK rising during CSN
low is less than 16.
CSN
SCK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
SDATA
O0 O1 A0 A1 A2 A3 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9
Ope
Code
Address
Data
Serial Write Control
The effect of operation code is determined by OP
pin control.
When OP pin is high, the data are always valid
regardless of O0 and O1.
When OP pin is low, operation code control is
active, and the data is written only when both O0 =
0 and O1 = 1 are true.
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