IR3Y48M View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
'IR3Y48M' PDF : 31 Pages View PDF
IR3Y48M
4. Register operations
CONTROLS
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
OPERATIONS
NOTE
ADCK polarity
0
Normal operation as timing chart
1
ADCK clock inversion
ADIN connection
00
ADIN function OFF
01
ADIN signal to AGC
1X
ADIN signal to ADC
Frequency mode
0
20 MHz mode
1
15 MHz mode
ADC output
0
Normal operation [ADC data output]
1
ADC output High-Z [or logic of STBYN]
1
Black level reset
0 Normal operation
1 Black level reset [or logic of RESETN]
2
Standby
0 Normal operation
1 Standby [or logic of STBYN]
NOTES :
1. ADC output is set to high impedance if one of following case is true.
Case 1 : Set "ADC output" bit to "1".
Case 2 : Set STBYN pin to low.
Case 3 : Set "Standby" bit to "1".
2. Black level integral CAP [OBCAP] is discharged if following case is true.
Case 1 : Set "Black level reset" to "1".
Case 2 : Set RESETN pin to low.
X : Don't care
16
Share Link: 
