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ISPGDX2 View Datasheet(PDF) - Lattice Semiconductor

Part Name
Description
MFG CO.
ISPGDX2
Lattice
Lattice Semiconductor Lattice
'ISPGDX2' PDF : 72 Pages View PDF
Lattice Semiconductor
ispGDX2 Family Data Sheet
Boundary Scan Timing Specifications
Over Recommended Operating Conditions
Parameter
tBTCP
tBTCPH
tBTCPL
tBTS
tBTH
tBTRF
tBTCO
tBTCODIS
tBTCOEN
tBTCRS
tBTCRH
tBUTCO
tBTUODIS
tBTUPOEN
Description
TCK [BSCAN] clock pulse width
TCK [BSCAN] clock pulse width high
TCK [BSCAN] clock pulse width low
TCK [BSCAN] setup time
TCK [BSCAN] hold time
TCK [BSCAN] rise/fall time
TAP controller falling edge of clock to valid output
TAP controller falling edge of clock to valid disable
TAP controller falling edge of clock to valid enable
BSCAN test capture register setup time
BSCAN test capture register hold time
BSCAN test update register, falling edge of clock to valid output
BSCAN test update register, falling edge of clock to valid disable
BSCAN test update register, falling edge of clock to valid enable
Min
Max Units
40
ns
20
ns
20
ns
8
ns
10
ns
50
mV/ns
10
ns
10
ns
10
ns
8
ns
10
ns
25
ns
25
ns
25
ns
46
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