JS28F128P30BF65A View Datasheet(PDF) - Numonyx -> Micron
Part Name
Description
MFG CO.
JS28F128P30BF65A
Numonyx -> Micron
'JS28F128P30BF65A' PDF : 90 Pages View PDF
P30-65nm SBC
6.0
6.1
Command Set
Device Command Codes
The flash Command User Interface (CUI) provides access to device read, write, and
erase operations. The CUI does not occupy an addressable memory location; it is part
of the internal logic which allows the flash device to be controlled. The Write State
Machine provides the management for its internal erase and program algorithms.
Commands are written to the CUI to control flash device operations. Table 6,
“Command Codes and Definitions†describes all valid command codes.
For operations that involve multiple command cycles, the possibility exists that the
subsequent command does not get issued in the proper sequence. When this happens,
the CUI sets Status Register bits SR[5,4] to indicate a command sequence error.
Table 6: Command Codes and Definitions (Sheet 1 of 2)
Mode
Read
Write
Erase
Code
0xFF
0x70
0x90
0x98
0x50
0x40
0xE8
0xD0
0x80
0xD0
0x20
0xD0
Device Mode
Description
Read Array
Places the device in Read Array mode. Array data is output on DQ[15:0].
Read Status
Register
Places the device in Read Status Register mode. The device enters this mode
after a program or erase command is issued. SR data is output on DQ[7:0].
Read Device ID
or Read
Configuration
Register (RCR)
Places device in Read Device Identifier mode. Subsequent reads output
manufacturer/device codes, Configuration Register data, Block Lock status,
or OTP Register data on DQ[15:0].
Read CFI
Places the device in Read Query mode. Subsequent reads output Common
Flash Interface (CFI) information on DQ[7:0].
Clear Status
Register
The WSM can only set SR error bits. The Clear Status Register command is
used to clear the SR error bits.
Word Program
Setup
First cycle of a 2-cycle programming command; prepares the CUI for a write
operation. On the next write cycle, the address and data are latched and the
WSM executes the programming algorithm at the addressed location. During
program operations, the device responds only to Read Status Register and
Program Suspend commands. CE# or OE# must be toggled to update the
Status Register in asynchronous read. CE# or ADV# must be toggled to
update the SR Data for synchronous Non-array reads. The Read Array
command must be issued to read array data after programming has finished.
Buffered Program
This command loads a variable number of words up to the buffer size of 256
words onto the program buffer.
Buffered Program
Confirm
The confirm command is issued after the data streaming for writing into the
buffer is done. This instructs the WSM to perform the Buffered Program
algorithm, writing the data from the buffer to the flash memory array.
BEFP Setup
First cycle of a 2-cycle command; initiates the BEFP mode. The CUI then
waits for the BEFP Confirm command, 0xD0, that initiates the BEFP
algorithm. All other commands are ignored when BEFP mode begins.
BEFP Confirm
If the previous command was BEFP Setup (0x80), the CUI latches the
address and data, and prepares the device for BEFP mode.
Block Erase Setup
First cycle of a 2-cycle command; prepares the CUI for a block-erase
operation. The WSM performs the erase algorithm on the block addressed by
the Erase Confirm command.
Block Erase Confirm
If the first command was Block Erase Setup (0x20), the CUI latches the
address and data, and the WSM erases the addressed block. During block-
erase operations, the device responds only to Read Status Register and Erase
Suspend commands. CE# or OE# must be toggled to update the Status
Register in asynchronous read. CE# or ADV# must be toggled to update the
SR Data for synchronous Non-array reads.
Datasheet
19
Apr 2010
Order Number:208033-02
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