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L6472PDTR View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
'L6472PDTR' PDF : 69 Pages View PDF
Programming manual
L6472
9.1.19
STATUS
Bit 15
SCK_MOD
Bit 7
NOTPERF_CMD
Table 31. STATUS register
Bit 14 Bit 13 Bit 12 Bit 11
Bit 10
X
Bit 6
X
Bit 5
OCD
Bit 4
TH_SD
Bit 3
TH_WRN
Bit 2
MOT_STATUS DIR SW_EVN SW_F
Bit 9
UVLO
Bit 1
BUSY
Bit 8
WRONG_CMD
Bit 0
HiZ
When the HiZ flag is high it indicates that the bridges are in high-impedance state. Any
motion command causes the device to exit from High Z state (HardStop and SoftStop
included), unless error flags forcing a High Z state are active.
The UVLO flag is active low and is set by an undervoltage lockout or reset event (power-up
included). The TH_WRN, TH_SD, OCD flags are active low and indicate respectively
thermal warning, thermal shutdown and overcurrent detection events.
The NOTPERF_CMD and WRONG_CMD flags are active high and indicate, respectively,
that the command received by SPI can't be performed or does not exist at all. The SW_F
reports the SW input status (low for open and high for closed).
The SW_EVN flag is active high and indicates a switch turn-on event (SW input falling
edge).
The UVLO, TH_WRN, TH_SD, OCD, NOTPERF_CMD, WRONG_CMD and SW_EVN flags
are latched: when the respective conditions make them active (low or high) they remain in
that state until a GetStatus command is sent to the IC.
The BUSY bit reflects the BUSY pin status. The BUSY flag is low when a constant speed,
positioning or motion command is under execution and is released (high) after the
command has been completed.
The SCK_MOD bit is an active high flag indicating that the device is working in step-clock
mode. In this case the step-clock signal should be provided through the STCK input pin. The
DIR bit indicates the current motor direction:
Table 32. STATUS register DIR bit
DIR
Motor direction
1
Forward
0
Reverse
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DocID022729 Rev 5
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