VID Tables
L6713A
Table 7. Voltage identification (VID) for Intel VR11 mode (See Note) (continued)
HEX code
Output
voltage
(1)
HEX code
Output
voltage
(1)
HEX code
Output
voltage
(1)
HEX code
Output
voltage
(1)
3 8 1.26250 7 8 0.86250 B 8 0.46250 F 8 0.06250
3 9 1.25625 7 9 0.85625 B 9 0.45625 F 9 0.05625
3 A 1.25000 7 A 0.85000 B A 0.45000 F A 0.05000
3 B 1.24375 7 B 0.84375 B B 0.44375 F B 0.04375
3 C 1.23750 7 C 0.83750 B C 0.43750 F C 0.03750
3 D 1.23125 7 D 0.83125 B D 0.43125 F D 0.03125
3 E 1.22500 7 E 0.82500 B E 0.42500 F E
OFF
3 F 1.21875 7
F 0.81875 B F 0.41875 F F
OFF
1. According to VR11 specs, the device automatically regulates output voltage 19 mV lower to avoid any
external offset to modify the built-in 0.5 % accuracy improving TOB performances. Output regulated
voltage is than what extracted from the table lowered by 19 mV built-in offset.
5.3
Voltage identifications (VID) for Intel VR10 mode + 6.25 mV
(VID7 does not care)
Table 8. Voltage identifications (VID) for Intel VR10 mode + 6.25 mV (See Note)
VID VID VID VID VID VID VID
4321056
Output
voltage
(1)
VID VID VID VID VID VID VID
4321056
Output
voltage
(1)
0 1 0 1 0 1 1 1.60000 1 1 0 1 0 1 1 1.20000
0 1 0 1 0 1 0 1.59375 1 1 0 1 0 1 0 1.19375
0 1 0 1 1 0 1 1.58750 1 1 0 1 1 0 1 1.18750
0 1 0 1 1 0 0 1.58125 1 1 0 1 1 0 0 1.18125
0 1 0 1 1 1 1 1.57500 1 1 0 1 1 1 1 1.17500
0 1 0 1 1 1 0 1.56875 1 1 0 1 1 1 0 1.16875
0 1 1 0 0 0 1 1.56250 1 1 1 0 0 0 1 1.16250
0 1 1 0 0 0 0 1.55625 1 1 1 0 0 0 0 1.15625
0 1 1 0 0 1 1 1.55000 1 1 1 0 0 1 1 1.15000
0 1 1 0 0 1 0 1.54375 1 1 1 0 0 1 0 1.14375
0 1 1 0 1 0 1 1.53750 1 1 1 0 1 0 1 1.13750
0 1 1 0 1 0 0 1.53125 1 1 1 0 1 0 0 1.13125
0 1 1 0 1 1 1 1.52500 1 1 1 0 1 1 1 1.12500
0 1 1 0 1 1 0 1.51875 1 1 1 0 1 1 0 1.11875
0 1 1 1 0 0 1 1.51250 1 1 1 1 0 0 1 1.11250
0 1 1 1 0 0 0 1.50625 1 1 1 1 0 0 0 1.10625
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