L6714
VID Tables
Table 7. Voltage identifications (VID) for Intel VR10 mode + 6.25mV (See Note).
VID VID VID VID VID VID VID
4321056
Output
voltage
(1)
VID VID VID VID VID VID VID
4321056
Output
voltage
(1)
1 0 1 1 0 1 0 1.29375 0 0 1 1 0 1 0 0.91875
1 0 1 1 1 0 1 1.28750 0 0 1 1 1 0 1 0.91250
1 0 1 1 1 0 0 1.28125 0 0 1 1 1 0 0 0.90625
1 0 1 1 1 1 1 1.27500 0 0 1 1 1 1 1 0.90000
1 0 1 1 1 1 0 1.26875 0 0 1 1 1 1 0 0.89375
1 1 0 0 0 0 1 1.26250 0 1 0 0 0 0 1 0.88750
1 1 0 0 0 0 0 1.25625 0 1 0 0 0 0 0 0.88125
1 1 0 0 0 1 1 1.25000 0 1 0 0 0 1 1 0.87500
1 1 0 0 0 1 0 1.24375 0 1 0 0 0 1 0 0.86875
1 1 0 0 1 0 1 1.23750 0 1 0 0 1 0 1 0.86250
1 1 0 0 1 0 0 1.23125 0 1 0 0 1 0 0 0.85625
1 1 0 0 1 1 1 1.22500 0 1 0 0 1 1 1 0.85000
1 1 0 0 1 1 0 1.21875 0 1 0 0 1 1 0 0.84375
1 1 0 1 0 0 1 1.21250 0 1 0 1 0 0 1 0.83750
1 1 0 1 0 0 0 1.20625 0 1 0 1 0 0 0 0.83125
1. According to VR10.x specs, the device automatically regulates output voltage 19mV lower to avoid any
external offset to modify the built-in 0.5% accuracy improving TOB performances. Output regulated voltage
is than what extracted from the table lowered by 19mVbuilt-in offset. VID7 doesn’t care.
5.4
Mapping for the AMD 6BIT mode
Table 8. Voltage identifications (VID) mapping for AMD 6BIT mode
VID4
VID3
VID2
VID1
400mV
200mV
100mV
50mV
VID0
25mV
5.5
Voltage identifications (VID) codes for AMD 6BIT mode
Table 9. Voltage identifications (VID) codes for AMD 6BIT mode (See Note).
VID VID VID VID VID VID
543210
Output
Voltage
(1)
VID VID VID VID VID VID
543210
Output
Voltage
(1)
0 0 0 0 0 0 1.5500 1 0 0 0 0 0 0.7625
0 0 0 0 0 1 1.5250 1 0 0 0 0 1 0.7500
0 0 0 0 1 0 1.5000 1 0 0 0 1 0 0.7375
0 0 0 0 1 1 1.4750 1 0 0 0 1 1 0.7250
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