Configuring the device
8
Configuring the device
L6714
Multiple DACs and different current reading methodologies need to be configured before the
system starts-up by programming the apposite pin DAC/CS_SEL.
The configuration of this pin identifies two main working areas (See Table 10) distinguishing
between compliancy with Intel VR10,VR11 or AMD 6BIT specifications. According to the
main specification considered, further customs can be done: main differences are regarding
the DAC table, soft-start implementation, protection management and Dynamic VID
Transitions. Of course, the Current Reading method can be still selected through DAC /
CS_SEL pin.
See Table 11 and See Table 12 for further details about the device configuration.
8.1
Note:
DAC selection
L6714 embeds a selectable DAC (through DAC/CS_SEL, See Table 10) that allows to
regulate the output voltage with a tolerance of ±0.5% (±0.6% for AMD DAC) recovering from
offsets and manufacturing variations. In case of selecting Intel Mode, the device
automatically introduces a -19mV (both VRD10.x and VR11) offset to the regulated voltage
in order to avoid any external offset circuitry to worsen the guaranteed accuracy and, as a
consequence, the calculated system TOB.
Table 10. DAC / CS_SEL settings (See Note).
DAC / CS_SEL
Resistance vs. SGND
DAC
Current sense
method
0 (Short)
170kΩ
270kΩ
OPEN
Intel
AMD
Inductor DCR
MOSFET RdsON
Inductor DCR
MOSFET RdsON
Filter DAC/CS_SEL pin with 100pF(max) vs. SGND.
OVP
VID + 150mV
(typ) or
Programmable
1.800V (typ) or
Programmable
UVP
-750mV (typ)
-750mV (typ)
Output voltage is programmed through the VID pins: they are inputs of an internal DAC that
is realized by means of a series of resistors providing a partition of the internal voltage
reference. The VID code drives a multiplexer that selects a voltage on a precise point of the
divider. The DAC output is delivered to an amplifier obtaining the voltage reference (i.e. the
set-point of the error amplifier, VREF).
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