L6919E View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'L6919E' PDF : 33 Pages View PDF
L6919E
Demo Board Description
The L6919E demo board shows the operation of the device in a dual phase application. This evaluation board
allows output voltage adjustability (0.800V - 1.550V) through the switches S0-S4 and high output current capa-
bility.
The board has been laid out with the possibility to use up to two D2PACK mosfets for the low side switch in order
to give maximum flexibility in the mosfet choice.
The four layers demo board's copper thickness is of 70µm in order to minimize conduction losses considering
the high current that the circuit is able to deliver.
Demo board schematic circuit is reported in Figure 19.
Figure 19. Demo Board Schematic
Vin
GNDin
Vcc
GNDcc
JP6
DZ1
JP2
JP1
R16
VCCDR
2
VCC
6
R11
C5
D4
C8
BOOT1
5
C7
D3
C6
BOOT2
24
C4
Q2
L1
R15
U GATE 1
4
PHASE1
3
UGATE2
25
R14
PHASE2
26
Q4
C3
L2
Q1
D1
Q1a
R18
R13
R6
LGATE1
1
ISEN1
13
U1
R17
LGATE2
27
R12
ISEN2
16
R3
Q3
D2
Q3a
S4
S3
S2
S1
S0
To pin
VCC
R21
L6919E PGNDS1
14
PGNDS2
15
R5
PGND
28
VID4
22
VID3
21
VID2
20
VID1
19
VID0
18
OSC / INH
17
PGOOD
23
VSEN
10
FB
9
R2
S GN D
7
COMP
8
11
12
FBR
FBG
R4
R10
JP3
R7 C24
R8
C1 R9
C2
C9,C10 C11..C13
C14,
R19
C23
R20
R1
JP4
JP5
VoutCORE
GNDCORE
PGOOD
FBG
FBR
Several jumpers allow setting different configurations for the device: JP3, JP4 and JP5 allow configuring the
remote buffer as desired. Simply shorting JP4 and JP5 the remote buffer is enabled and it senses the output
voltage on-board; to implement a real remote sense, leave these jumpers open and connect the FBG and FBR
connectors on the demo board to the remote load. To avoid using the remote buffer, simply short all the jumpers
JP3, JP4 and JP5. Local sense through the R7 is used for the regulation.
The input can be configured in different ways using the jumpers JP1, JP2 and JP6; these jumpers control also
the mosfet driver supply voltage. Anyway, power conversion starts from VIN and the device is supplied from VCC
(See Figure 20).
Figure 20. Power supply configuration
Vin
JP6
GNDin
Vcc
To Vcc pin
To HS Drains (Power Input)
To BOOTx (HS Driver Supply)
DZ1
JP2
JP1
To VCCDR pin (LS Driver Supply)
GNDcc
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