L99H01 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'L99H01' PDF : 53 Pages View PDF
4.3
Device memory map
4.3.1 Control and status (RAM) address map
Table 28. Control and status (RAM) address map
Address
Name
Access
A5 A4 A3 A2 A1 A0
D7
D6
D5
Content
D4
D3
D2
D1
D0
Stat Reg0 Read/ Clear 0 0 0 0 0 0 DS_MON_3 DS_MON_2 DS_MON_1 DS_MON_0
0
0
OT_EXT CP_LOW
Appl Reg1 Read/ Write 0 0 0 0 0 1
RWD
FW_PAS OFF_CAL CLK_SPCTR OVT
OV_UV_R
D
DIAG_1
DIAG_0
Appl Reg2 Read/ Write 0 0 0 0 1 0
RWD
COPT_2 COPT_1 COPT_0
FW
MCSA GCSA_1 GCSA_0
Appl Reg3 Read/ Write 0 0 0 0 1 1
RWD
EXT_TS EXTTH_5 EXTTH_4 EXTTH_3 EXTTH_2 EXTTH_1 EXTTH_0
4.3.2 Device (ROM) address map (access with OC0 and OC1 set to ‘1’)
Table 29. Device (ROM) address map (access with OC0 and OC1 set to ‘1’)
Address
Content
Name
Access
A5 A4 A3 A2 A1 A0
D7
D6
D5
D4
D3
D2
D1
D0
ID-Header
Product Code 1
Product Code 2
SPI-Frame-ID
Reserved
Read
device
Read
device
Read
device
Read
device
Read
device
0 0 0 0 0 0 FAM_1 FAM_0 NR_PI_5 NR_PI_4 NR_PI_3 NR_PI_2 NR_PI_1 NR_PI_0
0 0 0 0 0 1 PR_ID_7 PR_ID_6 PR_ID_5 PR_ID_4 PR_ID_3 PR_ID_2 PR_ID_1 PR_ID_0
0 0 0 0 1 0 PR_ID_15 PR_ID_14 PR_ID_13 PR_ID_12 PR_ID_11 PR_ID_10 PR_ID_9 PR_ID_8
000011
BR
AR5
AR4
AR3
32 bits
24 bits 16 bits 8 bits
1
1
1
1
1
1
Reserved, accessing this address is recognized as a failure, the device enters a fail-safe state
(see Table 30: STK_RESET_Q).
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