L99H01 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'L99H01' PDF : 53 Pages View PDF
L99H01
Functional description of the SPI
4.4
Global status byte
This byte is shifted out first at DO at every SPI access.
The GL_ER bit is present at DO with the falling edge of CSN.
This byte could be reseted with the command <clear status>.
Bit
Name
<default>
Table 30. STK_RESET_Q
15
14
13
12 11 10 9
8
GL_ER FE
0
0
STK_RESET_Q
1
TSD TW UV OV
0
0
0
0
WDTO
0
Comments:
• GL_ER: Global error flag. This signal is a logical OR among all the errors of all the
channels of the device.
• FE: Frame error. If the number of clock pulses within the previous frame is not 16 the
frame is ignored and this bit is set.
• STK_RESET_Q: If a stuck at ‘1’ on SPI_DI during any SPI frame occurs, or if a
power-on reset occurs. STK_RESET_Q is reset (‘1’) with any SPI command.
When STK_RESET_Q is active (‘0’), the gate drivers are switched-off (see Section 3.4:
Resistive low).
After a startup of the circuit the STK_RESET_Q is active because of the POR pulse
and the gate drivers are switched-off. The Gate drivers can only be activated after the
STK_RESET_Q has been reset with a SPI command.
• TSD: Thermal shutdown due to an internal sensor. All the gate drivers and the charge
pump must be switched-off (see Section 3.4: Resistive low). The gate drivers can only
be activated after the TSD has been reset with a SPI command.
• TW: Thermal warning
• UV: Logical OR among the filtered undervoltage signals.
• OV: Logical OR among the filtered overvoltage signals.
• WDTO: Watchdog time out.
Failures of <Global Status Register>[8:14] are always linked to the <Global Error Flag>.
The <Global Error Flag> is generated by an OR combination of all failure events of the
device (<Global Status Register>[8:14]).
The flag is reflected via the DO pin while CSN is held low and no clock signal is available.
The flag remains as long as CSN is low. This operation does not cause the <communication
error> bit in the <Global Status Byte> to be set.
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