L99H01 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'L99H01' PDF : 53 Pages View PDF
Functional description of the SPI
L99H01
Table 46. Address 2 <02(hex)>: product ID (MSB) - read only(1)
Bit
7
6
5
4
3
2
1
0
Name PR_ID_15 PR_ID_14 PR_ID_13 PR_ID_12 PR_ID_11 PR_ID_10 PR_ID_9 PR_ID_8
<default>
0
0
1
0
1
X
X
X
1. Addressable only through a read device Information command.
The <SPI-frame-ID> (ROM address 03H) provides information about the register width (1, 2,
3 bytes) and the availability of ‘burst mode read’ option.
Table 47. Address 3 <03(hex)>: SPI frame ID - read only(1)
Bit
7
6
5
4
3
2
1
Name
<default>
BR AR5 AR4 AR3
0
0
0
0
32 bits
0
24 bits
0
16 bits
1
1. Addressable only through a Read Device Information command.
0
8 bits
0
Comments:
• BR: Burst mode read. Not supported
• AR5: Address width reduction. Not supported
• AR4: Address width reduction. Not supported
• AR3: Address width reduction. Not supported
• 32 bits: 32 bits frame width. Not supported
• 24 bits: 24 bits frame width. Not supported
• 16 bits: 16 bits frame width, 8 bits command and 8 bits data
• 8 bits: 8 bits frame width. Not supported
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