LH543621 View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
'LH543621' PDF : 57 Pages View PDF
LH543611/21
RESOURCE-
REGISTER
ADDRESS
A2A A1A A0A
D35A
H H H X...
512 x 36 x 2/1024 x 36 x 2 BiFIFOs
Table 3a. LH543611 Resource-Register Programming
RESOURCE-REGISTER CONTENTS
NORMAL FIFO OPERATION
D0A
...X
MAILBOX
D35A
D0A
H H L X...
...X
HLH
D35A . . . D27A
AF2 Offset 1
AF2, AE2, AF1, AE1 FLAG REGISTER (36-BIT MODE)
D26A . . . D18A
AE2 Offset 1
D17A . . . D9A
AF1 Offset 1
D8A . . . D0A
AE1 Offset 1
D35A
H L L X...
CONTROL REGISTER: FLAG SYNCHRONIZATION, PARITY CONFIGURATION
D18A D17A
D9A
...X Port B Control 3
D8A
D1A D0A
Port A Control 3 PM 2
D35A
L H H X...
9-BIT AE1 FLAG OFFSET REGISTER
D9A
...X
D8A . . . D0A
AE1 Offset 1
D35A
L H L X...
9-BIT AF1 FLAG OFFSET REGISTER
D9A
..X
D8A . . . D0A
AF1 Offset 1
D35A
L L H X...
9-BIT AE2 FLAG OFFSET REGISTER
D9A
...X
D8A . . . D0A
AE2 Offset 1
D35A
9-BIT AF2 FLAG OFFSET REGISTER
D9A
L L L X...
...X
NOTES:
1. All four programmable-flag-offset values are initialized to eight (8) during a reset operation.
2. Parity Mode: Odd parity = HIGH; even parity = LOW. The parity mode is initialized to odd during a reset operation.
3. See Tables 5 and 6 and Figure 10 for the detailed format of the Control Register word.
D8A . . . D0A
AF2 Offset 1
18
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