SHARP
. - .-
LHFlGKA7
33
2.2 AC INPUT/OUTPUT TEST CONDITIONS
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AC test inputs are driven at 2.7V for a Logic “1” and O.OV for a Logic “0.” Input timing begins, and output timing ends, at 1.35V.
Input rise and fall times (10% to 90%) ~10 ns.
Figure 14. Transient Input/Output Reference Waveform for Vc,=2.7V-3.6V
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AC test inputs are driven at 3.OV for a Logic “1” and O.OV for a Logic “0.” Input timing begins, and output timing ends, at 1 SV.
Input rise and fail times (10% to 90%) cl 0 ns.
Figure 15. Transient Input/Output Reference Waveform for Vcc=3.3V*O.3V
1.3v
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Test Configuration Capacitance Loading Value
Test Configuration
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=3.3V~0.3V, 2.7V-3.6V 1
50
CL Includes Jig A CL
Capacitance
T
-
Figure 16. Transient Equivalent Testing
Load Circuit
Rev. 1.9