LPC47M112-MC View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
MFG CO.
LPC47M112-MC
SMSC -> Microchip
'LPC47M112-MC' PDF : 204 Pages View PDF
Enhanced Super I/O Controller with LPC Interface
Datasheet
PHASE
Command
PHASE
Command
Execution
Result
PHASE
Command
Execution
Result
RELATIVE SEEK
DATA BUS
R/W D7 D6 D5 D4 D3 D2 D1 D0
W 1 DIR 0 0 1 1
1
1
W 0 0 0 0 0 HDS DS1 DS0
W
─────── RCN ───────
REMARKS
DUMPREG
DATA BUS
R/W D7 D6 D5 D4 D3 D2 D1
W
0
0
0
0
11
1
D0
REMARKS
0 *Note:
Registers
placed in
FIFO
R
────── PCN-Drive 0 ───────
R
────── PCN-Drive 1 ───────
R
────── PCN-Drive 2 ───────
R
────── PCN-Drive 3 ───────
R
──── SRT ────
─── HUT ───
R
─────── HLT ───────
ND
R
─────── SC/EOT ───────
R LOCK 0 D3 D2 D1 D0 GAP WGATE
R
0 EIS EFIFO POLL
── FIFOTHR ──
R
──────── PRETRK ────────
READ ID
DATA BUS
R/W D7 D6 D5 D4 D3 D2 D1 D0
REMARKS
W 0 MFM 0 0 1 0
1
0 Commands
W 0 0 0 0 0 HDS DS1 DS0
The first correct ID
information on the
Cylinder is stored in
Data Register
R
──────── ST0 ────────
Status information after
Command execution.
R
R
R
R
R
R
SMSC DS – LPC47M112
──────── ST1 ────────
──────── ST2 ────────
──────── C ────────
──────── H ────────
──────── R ────────
──────── N ────────
Page 49
DATASHEET
Disk status after the
Command has
completed
Rev. 02-16-07
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