LPC47M14X View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
MFG CO.
'LPC47M14X' PDF : 205 Pages View PDF
REGISTER
Chip Level
Vendor Defined
Configuration
Address Byte 0
Default
=0x2E (Sysopt=0)
=0x4E (Sysopt=1)
on VCC POR and
HARD RESET
Configuration
Address Byte 1
ADDRESS
0x25
0x26
0x27
DESCRIPTION
Reserved - Writes are ignored, reads return 0.
Bit[7:1] Configuration Address Bits [7:1]
Bit[0] = 0
See Note 2
Bit[7:0] Configuration Address Bits [15:8]
See Note 2
STATE
C
C
Default = 0x00
on VCC POR and
HARD RESET
Default = 0x00
on VCC POR,
0x28
Bits[7:0] Reserved - Writes are ignored, reads return
0.
SOFT RESET and
HARD RESET
Chip Level
0x29 Reserved - Writes are ignored, reads return 0.
Vendor Defined
TEST 6
0x2A R/W Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired results.
Default = 0x00, on
VCC POR and
VTR POR
TEST 4
0x2B R/W Test Modes: Reserved for SMSC. Users should not
C
write to this register, may produce undesired results.
Default = 0x00, on
VCC POR and
VTR POR
TEST 5
0x2C R/W Bit[7] Test Mode: Reserved for SMSC. Users
C
should not write to this bit, may produce undesired
Default = 0x00, on
VCC POR and
results.
Bit[6] 8042 Reset:
VTR POR
1 = put the 8042 into reset
0 = take the 8042 out of reset
Bits[5:0] Test Mode: Reserved for SMSC. Users
should not write to this bit, may produce undesired
results.
TEST 1
0x2D R/W Test Modes: Reserved for SMSC. Users should not
C
write to this register, may produce undesired results.
Default = 0x00, on
VCC POR and
VTR POR
TEST 2
0x2E R/W Test Modes: Reserved for SMSC. Users should not
C
write to this register, may produce undesired results.
Default = 0x00, on
VCC POR and
VTR POR
SMSC DS – LPC47M14X
Page 158
Rev. 03/19/2001
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