LPC47U33X View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
MFG CO.
LPC47U33X
SMSC -> Microchip
'LPC47U33X' PDF : 252 Pages View PDF
When both GAP and WGATE bits of the
PERPENDICULAR MODE COMMAND are both
programmed to "0" (Conventional mode), then
D0, D1, D2, D3, and D4 can be programmed
independently to "1" for that drive to be set
automatically to Perpendicular mode. In this
mode the following set of conditions also apply:
1. The GAP2 written to a perpendicular drive
during a write operation will depend upon the
programmed data rate.
2. The write pre-compensation given to a
perpendicular mode drive will be 0ns.
3. For D0-D3 programmed to "0" for
conventional mode drives any data written
will be at the currently programmed write
pre-compensation.
Note: Bits D0-D3 can only be overwritten when
OW is programmed as a "1".If either GAP or
WGATE is a "1" then D0-D3 are ignored.
Software and hardware resets have the
following effect on the PERPENDICULAR
MODE COMMAND:
1. "Software" resets (via the DOR or DSR
registers) will only clear GAP and WGATE
bits to "0". D0-D3 are unaffected and retain
their previous value.
2. "Hardware" resets will clear all bits
(GAP, WGATE and D0-D3) to "0", i.e all
conventional mode.
WGATE
0
0
1
1
Table 32 - Effects of WGATE and GAP Bits
LENGTH OF
PORTION OF GAP 2
GAP2 FORMAT WRITTEN BY WRITE
GAP
MODE
FIELD
DATA OPERATION
0 Conventional
22 Bytes
0 Bytes
1 Perpendicular
22 Bytes
19 Bytes
(500 Kbps)
0 Reserved
22 Bytes
0 Bytes
(Conventional)
1 Perpendicular
41 Bytes
38 Bytes
(1 Mbps)
LOCK
In order to protect systems with long DMA
latencies against older application software that
can disable the FIFO the LOCK Command has
been added. This command should only be
used by the FDC routines, and application
software should refrain from using it. If an
application calls for the FIFO to be disabled
then the CONFIGURE command should be
used.
The LOCK command defines whether the
EFIFO, FIFOTHR, and PRETRK parameters of
the CONFIGURE command can be RESET by
the DOR and DSR registers. When the LOCK
bit is set to logic "1" all subsequent "software
RESETS by the DOR and DSR registers will not
change the previously set parameters to their
default values. All "hardware" RESET from the
nPCI_RESET pin will set the LOCK bit to logic
"0" and return the EFIFO, FIFOTHR, and
PRETRK to their default values. A status byte is
returned immediately after issuing a LOCK
command. This byte reflects the value of the
LOCK bit set by the command byte.
Enhanced DUMPREG
The DUMPREG command is designed to
support system run-time diagnostics and
application software development and debug.
To accommodate the LOCK command and the
enhanced PERPENDICULAR MODE command
the eighth byte of the DUMPREG command has
been modified to contain the additional data
from these two commands.
70
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