LRS1302 View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
'LRS1302' PDF : 61 Pages View PDF
-
SHARP
LRS13023
2
Part 1 Overview
l.Description
The LRS1302 is a combination memory organized as 1448,576 X 8
memory and 131,072X8 bit static RAM in one package.
It is fabricated using silicon-gate CMOS process technology.
Features
bit flash
OAccess Time
Flashmemoryaccesstime
SRAM access time
OOpemtingcurrent
Flash memory Read
Byte write
Block erase
SRAM
operatin%
- * **
... .
.. ..
... .
... .
- -**
130 nsMax.
70 nsMax.
12 mAMax.
57 r&Max.
37 mAMax.
25 mA Max.
,
(t&ti2OOns)
hcxJz.=2=)
ostandbycurrent
Flash memory
... .
20 @ Max. (F-EZF-Vc,0.2V,
EbO.2V, F-V&O.2V)
Sk4M
. .. .
30 pA Max. (S-EZS-Vc,0.2V)
. ...
0.7 @ Typ. (T,=25”c, S-V,-3V,
S-CErs-Vcc-0.2V)
(Total standby curnat is the summation of Flash memory’s standby current and SRAM’s one.)
OPower supply
. .. .
2.7V to 3.6V @ead/SRAM write)
2.7~ to 3.6~ @LASH erase/write)(T,=O to 85c
OSRAM data retention voltage
OOperating temperature
OFully static operation
oThree-state output
. .. .
2.0 V Min.
40°C to +85”c
ONot designed or rated as radiation hardened
040 pin TSOP ( TSOP~O-p-0819 plastic package
OFlash memory has P-type bulk silicon, and SRAh4 has N-type bulk silicon.
The contents described in Part 1 take first priority over Part 2 and Part 3.
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