LRS1302 View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
'LRS1302' PDF : 61 Pages View PDF
SHARI=
LRS13023
4
3. Notes
This product is a stacked TSOP package that a 1,048,576X 8 bit Flash Memory and a
131,072 X 8 bit SRAM are assembled into.
POWER SUPPLY AND CHIP ENABLE OF FLASH MEMORY AND SRAM
It is forbidden that both F-E and S-E should be LOW simultaneously. If the two memories are active
together, possibly they may not operate normally by interference noises or data collision on I/O bus.
Both F-V, and S-V, are needed to be applied by the recommended supply voltage at the same time except
SRAM data retention mode.
SUPPLY POWER
Maximum difference (between F-V, and S-V, ) of the voltage is less than -0.3V.
SRAM DATA RETENTION
SRAM data retention is capable in three ways as below. SRAM power switching between a system
battery and a backup battery needs careful device decouplingfrom FlashMemory to prevent SRAM supply
voltage from failing lower han 2.OV by a FlashMemory peakcurrent causedby transition of Flash Memory
supply voltage or of control si{nals (F-B, F-?% andRP).
CASE I: FLASH MEMORY IS IN STANDBY MODE. (F-Vcc=2.7V to 3.6V)
* SRAM inputs andinput/outputs except S-mare neededto be appliedwith voltages in the rangeof
-0.3V to S-Vcc+O.3V or to be open(High-Z).
* FlashMemory inputsand input/outputsexcept F-eand Gare neededto be applied with voltages in
the range of -0.3V to S-V,,+O.3V or to be open(High-Z).
CASE 2: FLASH MEMORY IS IN DEEP POWER DOWN MODE. (F-Vcc=2.7V to 3.6V)
* SRAM inputs andinput/outputs except S-mare neededto be appliedwilh voltages in the rangeof
-0.3V to S-V,c+O.3V or to be open.
* FlashMemory inputs and input/outputs except mare neededto be appliedwith voltages in the rangeof
-0.3V to S-Vc,+O.3V or to beopen(High-Z). RP is neededto be at the samelevel asF-V,, or to be
open.
CASE 3: FLASH MEMORY POWER SUPPLY IS TURNED OFF. (F-VcpOV)
* Fix- LOW level before turning off Flash memory power supply.
* SRAM inputs andinput/outputs except S-mare neededto be appliedwith voltages in the rangeof
-0.3V to S-V,c+O.3V or to be open(High-Z).
- FlashMemory inputs and input/outputsexcept mare neededto be at GND or to be open(High-Z).
POWER UP SEQUENCE
When turning on Flash memory power supply, keepi@ LOW. After F-V,, reachesover 2.7V, keep RP
LOW for more than 1OOnsec.
DEVICE DECOUPLING
The power supply is neededto bedesignedcarefully becauseoneof the SRAM and the FlashMemory is
in standby modewhen the other is active. A careful decouplingof powersuppliesis necessarybetween
SRAM andFlash Memory. Note peakcurrent causedby transition of control signals.
The contentsdescribedin Part 1 take first priority over Part 2 andPart 3.
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