LRS1302 View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
'LRS1302' PDF : 61 Pages View PDF
SHARP
LRS13023
5
4.Truth table(* 1.3)
F-a F-m F-m RP S-a S-m S-m Address
Mode
I/O, toI/O, Current Note
LLHHHXXX
LHHHHXXX
Flash read
Flash read
output
High-Z
EC *2,7
I,,
*4
LHLHHXXX
HXXXLLHX
Flash write
SRAM read
Input
output
kc
*5,6,7
Ice
HXXXLHHX
sR4M read High-Z
I,,
HXXXLXLX
HXXHHXXX
SRAM write Input
I cc
Standby
High-Z
Iss
HXXLHXXX
Deep power down High-Z
Isa
*4
Notes:
* 1. Do not make F-C? and S-C8 “LOW” level at the samc,limc.
* 2. Reffcr to DC Character&tics. When F-V&V,,.,.,, memory contents can be read, but not altered.
* 3. X can be V,,, or V,,, for control pins and addresses, and V,,nx or VI,,,,, for F-V,,,,. See DC Characteristics
for V,,,k and V,,.,, voltages.
* 4. i@ at GND f0.2V ensures the lowest deep power-down current.
* 5. Command writes involving block erase, write, or lock-bit configuration are reliably executed when
F-V,,=V,, and F-V,@,.
Block erase, byte write, or lock-bit conliguration with Vcc<3.0V or
V,,, <m< V,,,, produce spurious results and should not be attempted.
* 6. Reffer to Part 2 Section 3 Table 4 for valid DIN during a write operation.
$7. Do not use in a timing that both F-mand F-WE is “LOW” level.
5. Block Diagram
F-n
F-GE
F-m
RP
F-A,, to F-A,,
F-V, F-V,,
9____________________----------.------------------------------------------
w
v
i
3
/
>
j
>
;
>
1,048,576 X 8 bit Flash memory
!
>
&to&,
;
I4
S-TE /
>
S-FE
>
s-m ; >
131,072X8 bit SR4M
0
I
>
e-
;
e
The contents described in Part 1 take first priority over Part 2 and Part 3.
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