‘SHARP
LRS13023
41
I
6.2.7 BLOCK ERASE, BYTE WRlTE AND LOCK-BIT CONFIGURATION
PEWORMANCE(3)
NOTES:
1. Typical values measured at TA--+2S”C and nominal
to change based on device characterization.
2. Excludes system-level overhead.
3. Sampled but not 100% tested.
voltages. Assumes corresponding
lock-bits are not set. Subject