SHARP
LRS13023
49
Write cycle timing chart (m Low fixed)
CE
< L4 +4N>
i
DIN
(*la
/
Data Valid
\
Notes
-
-
* 8. A write occurs during the overlap of a low CE! and low WE.
A write begins at the latest transition among= going low and WE going low.
A write ends at the earliest transition among= going high and WE going high. t,, is measured from the
beginning of write to the end of write.
* 9. &,, is measured from the- going low to the end of write.
* 10. t,,, is measured from the address valid to the beginning of write.
* I 1. t,, is measured from the end of write to the address change. twR app lies in case a write ends at?% or WE going
high.
* 12. During this period, I/O pins are in the output state, therefore the input signals of opposite phase to the outputs
must not be applied.
* 13. If CE goes low simultaneously with Wl? going low or after WE going low, the outputs remain in high
impedance state.
* 14. If CE goes high simultaneously with WE going high or before WE going high, the outputs remain in high
impedance state.
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