LRS1383
20
12. AC Electrical Characteristics for Flash Memory
12.1 AC Test Conditions
Input pulse level
Input rise and fall time
Input and Output timing Ref. level
Output load
0 V to 2.7 V
5 ns
1.35 V
1TTL + CL (50pF)
12.2 Read Cycle
(TA = -25°C to +85°C, F-VCC = 2.7V to 3.3V)
Symbol
Parameter
Notes Min. Max. Unit
tAVAV
Read Cycle Time
85
ns
tAVQV
Address to Output Delay
85
ns
tELQV
F-CE to Output Delay
2
85
ns
tAPA
tGLQV
tPHQV
Page Address Access Time
F-OE to Output Delay
F-RST High to Output Delay
30
ns
2
20
ns
150
ns
tEHQZ, tGHQZ F-CE or F-OE to Output in High - Z, Whichever Occurs First
1
20
ns
tELQX
F-CE to Output in Low - Z
1
0
ns
tGLQX
F-OE to Output in Low - Z
1
0
ns
tOH
Output Hold from First Occurring Address, F-CE or F-OE change 1
0
ns
Note:
1. Sampled, not 100% tested.
2. F-OE may be delayed up to tELQV
tGLQV after the falling edge of F-CE without impact to tELQV.