LRS1383 View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
'LRS1383' PDF : 114 Pages View PDF
LRS1383
36
17. Design Considerations
1. Power Supply Decoupling
To avoid a bad effect to the system by flash memory power switching characteristics, each device should have a 0.1µF
ceramic capacitor connected between its F-VCC and GND and between its F-VPP and GND.
Low inductance capacitors should be placed as close as possible to package leads.
2. F-VPP Trace on Printed Circuit Boards
Updating the memory contents of flash memories that reside in the target system requires that the printed circuit board
designer pay attention to the F-VPP Power Supply trace. Use similar trace widths and layout considerations given to the F-
VCC power bus.
3. The Inhibition of Overwrite Operation
Please do not execute reprograming “0” for the bit which has already been programed “0”. Overwrite operation may
generate unerasable bit.
In case of reprograming “0” to the data which has been programed “1”.
• Program “0” for the bit in which you want to change data from “1” to “0”.
• Program “1” for the bit which has already been programed “0”.
For example, changing data from “1011110110111101” to “1010110110111100”
requires “1110111111111110” programing.
4. Power Supply
Block erase, full chip erase, word write and lock-bit configuration with an invalid F-VPP
(See Chapter 11. DC Electrical Characteristics) produce spurious results and should not be attempted.
Device operations at invalid F-VCC voltage (See Chapter 11. DC Electrical Characteristics) produce spurious results
and should not be attempted.
18. Related Document Information(1)
Document No.
Document Name
FUM00701
LH28F320BX, LH28F640BX Series Appendix
Note:
1. International customers should contact their local SHARP or distribution sales offices.
Share Link: 
